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2010-03-22MC: Share the MCAsmLayout object, although its still not used for anything ↵Daniel Dunbar
important. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99202 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Rename one more NEON instruction that I missed earlier.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Fix a memory leak from DIE::addSiblingOffset() by adding the DIEValueJeffrey Yasskin
it allocates to DwarfDebug::DIEValues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-2280 col violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Regroup some instructions. No functional change.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99192 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Rename some VLD1/VST1 instructions to match the implementation, i.e., theBob Wilson
corresponding NEON instructions, instead of operation they are currently used for. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Remove some redundant instruction classes.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Refactor instruction encoding arguments for VLDnLN/VSTnLN classes toBob Wilson
specify encoding bits in arguments instead of "let" expressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Completely remove Blackfin patterns that thought JustCC was i1.Jakob Stoklund Olesen
Thanks, Chris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Don't leak a MachineInstruction from ↵Jeffrey Yasskin
Thumb1InstrInfo::restoreCalleeSavedRegisters. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22backing out r99170 because it still fails on clang-x86_64-darwin10-fntGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Now that hopefully all direct accesses to InvokeInst operands are fixedGabor Greif
we can reapply the InvokeInst operand reordering patch. (see r98957). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22Free all Constants in ~LLVMConstantImpl. We avoid assertion failuresJeffrey Yasskin
by dropping all references from all constants that can use other constants before trying to destroy any of them. I also had to free bugpoint's Module in ~BugDriver(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-21Re-add the Metadata.h include to LLVMContextImpl.h so that MDNode is completeJeffrey Yasskin
where FoldingSet<MDNode> is instantiated. Clang and MSVC complain; gcc doesn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-21Move the LLVMContextImpl implementation into a .cpp file.Jeffrey Yasskin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99146 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-21Memoize InlineAsms into the LLVMContext and delete them on shutdown.Jeffrey Yasskin
Fixes PR803. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-21Free SavedLI even if SimpleRegisterCoalescing::JoinCopy() returns early.Jeffrey Yasskin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20MC/X86: Fix an MCOperand link, when we parsing shrld $1,%eax and friends; I ↵Daniel Dunbar
believe this fixes the last memory leaks under test/MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20pr6652: Use LDM to restore PC to the return address on ARMv4.Bob Wilson
Patch by John Tytgat! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")Bob Wilson
with changes to add a separate optional register update argument. Change all the NEON instructions with address register writeback to use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99095 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add instruction variants for VST2, VST3, and VST4 "store-lane" operations withBob Wilson
address register writeback. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99094 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add variants of VST2, VST3 and VST4 with address register writeback, andBob Wilson
rewrite the existing VST3 and VST4 instructions to use the same classes as the others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99093 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add instructions for double-spaced VST3 and VST4 without address registerBob Wilson
writeback, and refactor the existing double-spaced VST2 instructions. These are only for the disassembler since codegen doesn't use them, at least for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add a setCalledFunction member to InvokeInst (like in CallInst)Gabor Greif
and use this (as well as getCalledValue) to access the callee, instead of {g|s}etOperand(0). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add VST1 instructions with address register writeback.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add instruction variants for VLD2, VLD3, and VLD4 "load-lane" operations withBob Wilson
address register writeback. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Tidy some more comments and whitespace.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99081 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add variants of VLD2, VLD3 and VLD4 with address register writeback, andBob Wilson
rewrite the existing VLD3 and VLD4 instructions to use the same classes as the others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Tidy some comments and whitespace for consistency.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Rename some instructions for consistency and sanity: use "_UPD" suffix forBob Wilson
load/stores with address register writeback, and use "odd" suffix to distinguish instructions to access odd numbered registers (instead of "a" and "b"). No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add instructions for double-spaced VLD3 and VLD4 without address registerBob Wilson
writeback, and refactor the existing double-spaced VLD2 instructions. These are only for the disassembler since codegen doesn't use them, at least for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add VLD1 instructions with address register writeback.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20PIC16: Simplify code by using a std::set<std::string> instead of a sorted & ↵Benjamin Kramer
uniqued std::list of leaked char*. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Revert the rest of 98679.Bob Wilson
--- Reverse-merging r98679 into 'lib/Target/ARM/ARMInstrVFP.td': U lib/Target/ARM/ARMInstrVFP.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99049 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Fix a very bad typo. Since the register number was off by one, the ARMBob Wilson
load/store optimizer would incorrectly think that registers D26 and D28 were consecutive and would generate a VLDM instruction to load them. The assembler was not convinced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Clear the SCEVExpander's insertion point after making deletions,Dan Gohman
so that the SCEVExpander doesn't retain a dangling pointer as its insert position. The dangling pointer in this case wasn't ever used to insert new instructions, but it was causing trouble with SCEVExpander's code for automatically advancing its insert position past debug intrinsics. This fixes use-after-free errors that valgrind noticed in test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll and test/Transforms/IndVarSimplify/exit_value_tests.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99036 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20If call result is in ST0 and it is not being passed to the caller'sEvan Cheng
caller, then it is not safe to optimize the call into a sibcall since the call result has to be popped off the x87 stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99032 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Better fix for r98994, MachObjectWriterImpl wasn't intended to be virtual.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20Add NLdStFrm Format.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99014 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Revert r98679. The disassembler will be updated to depend on the existence ofJohnny Chen
IndexModeUpd and then populates the Inst{21}=1 while populating the instructions for disassembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99013 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Revert this change, since it was causing ARM performance regressions.Bob Wilson
--- Reverse-merging r98889 into '.': U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/ARMISelLowering.h U lib/Target/ARM/ARMInstrInfo.td U lib/Target/ARM/ARMInstrVFP.td U lib/Target/ARM/ARMISelLowering.cpp U lib/Target/ARM/ARMInstrFormats.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Fix more places to more thoroughly ignore debug intrinsics. This fixesDan Gohman
use-before-def errors in SCEVExpander-produced code in sqlite3 when debug info with optimization is enabled, though the testcases for this are dependent on use-list order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19remove the patterns that I commented out in r98930, Dan verified Chris Lattner
that they are dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99000 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Fix -Wnon-virtual-dtor warning.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1)Devang Patel
is valid, but not useful, when variable identified by !1 is optimized away by the optimizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Fixed the encoding problems of the crc32 instructions. All had the Operand sizeKevin Enderby
override prefix and only the r/m16 forms should have had that. Also for variant one, the AT&T syntax, added suffixes to all forms. Also added the missing 64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and tweaked one test case to add the needed suffixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Stop trying to merge identical jump tables. This had been inadvertentlyBob Wilson
disabled for several months (since svn r88806) and no one noticed. My fix for pr6543 yesterday reenabled it, but broke the ARM port's code for using TBB/TBH. Rather than adding a target hook to disable merging for Thumb2 only, I'm just taking this out. It is not common to have identical jump tables, the code we used to merge them was O(N^2), and it only helps code size, not performance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19MC/Mach-O/x86_64: Add relocation support.Daniel Dunbar
- This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information. - There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily). - 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen ↵Daniel Dunbar
only" so they don't get selected by the asm matcher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98972 91177308-0d34-0410-b5e6-96231b3b80d8
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