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2005-04-13Disbale the broken fold of shift + sz[ext] for nowNate Begeman
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc always produces zero or one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13fix an infinite loopChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21289 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13fix some serious miscompiles on ia64, alpha, and ppcChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21288 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13avoid work when possible, perhaps fix the problem nate and andrew are seeingChris Lattner
with != 0 comparisons vanishing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21287 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13WOW, function calls still seem to work after this.Andrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21286 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13prepare for func call optimizationAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21285 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13* add the shladd instructionDuraid Madina
* fold left shifts of 1, 2, 3 or 4 bits into adds This doesn't save much now, but should get a serious workout once multiplies by constants get converted to shift/add/sub sequences. Hold on! :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21282 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13add matches for SxADDL and company, as well as simplify the SxADDQ codeAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21281 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Implement expansion of unsigned i64 -> FP.Chris Lattner
Note that this probably only works for little endian targets, but is enough to get siod working :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21280 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13* if ANDing with a constant of the form:Duraid Madina
0x00000..00FFF..FF ^ ^ ^ ^ any number of 0's followed by some number of 1's then we use dep.z to just paste zeros over the input. For the special cases where this is zxt1/zxt2/zxt4, we use those instructions instead, because we're all about readability!!! that's what it's about!! readability! *twitch* ;D git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21279 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13added all flavors of zap for andingAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21276 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Make expansion of uint->fp cast assert out instead of infinitely recurse.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21275 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Fix some mysteriously missing {}'s which cause the miscompilation ofChris Lattner
Olden/mst, Ptrdist/bc, Obsequi, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21274 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13add back the optimization that Nate added for shl X, (zext_inreg y)Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21273 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Oops, remove these too.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21272 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13remove one more occurance of this that snuck inChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21271 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuffChris Lattner
like this: ldah $1,1($31) lda $1,-1($1) and $0,$1,$24 instead of this: zap $0,252,$24 To get this back, the selector should recognize the ISD::AND case where this happens and emit the appropriate ZAP instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21270 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causingChris Lattner
things like this: mov r9 = 65535;; and r8 = r8, r9;; To be emitted instead of: zxt2 r8 = r8;; To get this back, the selector for ISD::AND should recognize this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21269 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emitChris Lattner
andi instructions instead of rlwinm instructions for zero extend, but they seem like they would take the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21268 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Z_E_I is goneChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21267 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Instead of making ZERO_EXTEND_INREG nodes, use the helper method inChris Lattner
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as it is gone git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21266 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodesChris Lattner
instead. OVerall, this increases the amount of folding we can do. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21265 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Fold shift x, [sz]ext(y) -> shift x, yNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21262 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Fold shift by size larger than type size to undefNate Begeman
Make llvm undef values generate ISD::UNDEF nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Implement setcc op, -1 sequencesNate Begeman
Remove dead setcc op, 0 sequences Coming later: generalization of op, imm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12promote extload i1 -> extload i8Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21258 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12add an argument to allow avoiding deleting phi nodes.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21255 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Get rid of this for_each loopChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21253 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12* OK, after changing to use liveIn/liveOut instead of IDEFs,Duraid Madina
to avoid redundant mov out3=r44 type instructions, we need to tell the register allocator the truth about out? registers. FIXME: unfortunately, since the list of allocatable registers is immutable, we can't simply 'delete r127' from the allocation order, say, if 'out0' is used. The only correct thing we can do is have a linear order of regs: out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127 and slide a 'window' of 96 registers along this line, depending on how many of the out? regs a function actually uses. The only downside of this is that the out? registers will be allocated _first_, which makes the resulting assembly ugly. :( Note this in the README. Hope this gets fixed soon. :) (note the 3rd person speech there) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21252 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Get rid of idefs for arguments (oops)Andrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21251 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Get rid of idefs for argumentsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21250 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Put out* into the allocation order, allowing the register allocator toChris Lattner
coallesce moves into outgoing args. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21249 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Make sure to realize that calls use their argument regsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21248 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12stop emitting IDEFs for args - change to using liveIn/liveOutDuraid Madina
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21247 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Initial support for allocation condition registersNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21246 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Fix a crash analyzing MultiSource/Benchmarks/MallocBench/gsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21245 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Remove some redundant checks, add a couple of new ones. This allows us toChris Lattner
compile this: int foo (unsigned long a, unsigned long long g) { return a >= g; } To: foo: movl 8(%esp), %eax cmpl %eax, 4(%esp) setae %al cmpl $0, 12(%esp) sete %cl andb %al, %cl movzbl %cl, %eax ret instead of: foo: movl 8(%esp), %eax cmpl %eax, 4(%esp) setae %al movzbw %al, %cx movl 12(%esp), %edx cmpl $0, %edx sete %al movzbw %al, %ax cmpl $0, %edx cmove %cx, %ax movzbl %al, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21244 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Emit comparisons against the sign bit better. Codegen this:Chris Lattner
bool %test1(long %X) { %A = setlt long %X, 0 ret bool %A } like this: test1: cmpl $0, 8(%esp) setl %al movzbl %al, %eax ret instead of: test1: movl 8(%esp), %ecx cmpl $0, %ecx setl %al movzbw %al, %ax cmpl $0, 4(%esp) setb %dl movzbw %dl, %dx cmpl $0, %ecx cmove %dx, %ax movzbl %al, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21243 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Emit long comparison against -1 better. Instead of this (x86):Chris Lattner
test2: movl 8(%esp), %eax notl %eax movl 4(%esp), %ecx notl %ecx orl %eax, %ecx cmpl $0, %ecx sete %al movzbl %al, %eax ret or this (PPC): _test2: nor r2, r4, r4 nor r3, r3, r3 or r2, r2, r3 cntlzw r2, r2 srwi r3, r2, 5 blr Emit this: test2: movl 8(%esp), %eax andl 4(%esp), %eax cmpl $-1, %eax sete %al movzbl %al, %eax ret or this: _test2: .LBB_test2_0: ; and r2, r4, r3 cmpwi cr0, r2, -1 li r3, 1 li r2, 0 beq .LBB_test2_2 ; .LBB_test2_1: ; or r3, r2, r2 .LBB_test2_2: ; blr it seems like the PPC isel could do better for R32 == -1 case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21242 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12canonicalize x <u 1 -> x == 0. On this testcase:Chris Lattner
unsigned long long g; unsigned long foo (unsigned long a) { return (a >= g) ? 1 : 0; } It changes the ppc code from: _foo: .LBB_foo_0: ; entry mflr r11 stw r11, 8(r1) bl "L00000$pb" "L00000$pb": mflr r2 addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb") lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2) lwz r4, 0(r2) lwz r2, 4(r2) cmplw cr0, r3, r2 li r2, 1 li r3, 0 bge .LBB_foo_2 ; entry .LBB_foo_1: ; entry or r2, r3, r3 .LBB_foo_2: ; entry cmplwi cr0, r4, 1 li r3, 1 li r5, 0 blt .LBB_foo_4 ; entry .LBB_foo_3: ; entry or r3, r5, r5 .LBB_foo_4: ; entry cmpwi cr0, r4, 0 beq .LBB_foo_6 ; entry .LBB_foo_5: ; entry or r2, r3, r3 .LBB_foo_6: ; entry rlwinm r3, r2, 0, 31, 31 lwz r11, 8(r1) mtlr r11 blr to: _foo: .LBB_foo_0: ; entry mflr r11 stw r11, 8(r1) bl "L00000$pb" "L00000$pb": mflr r2 addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb") lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2) lwz r4, 0(r2) lwz r2, 4(r2) cmplw cr0, r3, r2 li r2, 1 li r3, 0 bge .LBB_foo_2 ; entry .LBB_foo_1: ; entry or r2, r3, r3 .LBB_foo_2: ; entry cntlzw r3, r4 srwi r3, r3, 5 cmpwi cr0, r4, 0 beq .LBB_foo_4 ; entry .LBB_foo_3: ; entry or r2, r3, r3 .LBB_foo_4: ; entry rlwinm r3, r2, 0, 31, 31 lwz r11, 8(r1) mtlr r11 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21241 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Implement bitfield clearsNate Begeman
Implement divide by negative power of two git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21240 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Update PPC readme. Remove things that are done or aren't ppc specificNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21232 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Teach the dag mechanism that this:Chris Lattner
long long test2(unsigned A, unsigned B) { return ((unsigned long long)A << 32) + B; } is equivalent to this: long long test1(unsigned A, unsigned B) { return ((unsigned long long)A << 32) | B; } Now they are both codegen'd to this on ppc: _test2: blr or this on x86: test2: movl 4(%esp), %edx movl 8(%esp), %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21231 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Fix expansion of shifts by exactly NVT bits on arch's (like X86) that haveChris Lattner
masking shifts. This fixes the miscompilation of this: long long test1(unsigned A, unsigned B) { return ((unsigned long long)A << 32) | B; } into this: test1: movl 4(%esp), %edx movl %edx, %eax orl 8(%esp), %eax ret allowing us to generate this instead: test1: movl 4(%esp), %edx movl 8(%esp), %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21230 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11IA64 supports this operation.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11ORo sets CR0Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21227 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Revert the previous patch, which I didn't mean to check in.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21226 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Fix a minor bug (ORo didn't mark that it set CR0).Chris Lattner
Refactor how . instructions are handled. In particular, instead of passing the RC flag all the way up the inheritance hierarchy, just make a new tblgen class 'DOT' which can be added to an instruction definition. For example, instead of this: -def AND : XForm_6<31, 28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), -let Defs = [CR0] in -def ANDo : XForm_6<31, 28, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), - "and. $rA, $rS, $rB">; We now have this: +def AND : XForm_6<31, 28, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB), "and $rA, $rS, $rB">; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21225 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11hmm, should probably change addImm() to take 64-bit arguments one day anyway.Duraid Madina
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Add recording variants of ISD::AND and ISD::OR. This kills almost 1000Nate Begeman
(1.5%) instructions in 186.crafty git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21222 91177308-0d34-0410-b5e6-96231b3b80d8
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