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2011-08-12MachOWriter: Don't crash on fixups with arithmetic, emit a relocation ↵Benjamin Kramer
instead. This matches what as does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12findDeadCallerSavedReg fix: Missing NULL terminator in register arrays.Andrew Trick
Fix by Ivan Baev. Sorry I don't have a unit test, but the fix is obvious so I don't want to delay it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12Don't convert objc_autoreleaseReturnValue to objc_autorelease if the resultDan Gohman
is returned through a bitcast. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137402 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12Don't let arbitrary calls disrupt nested retain+release pairs ifDan Gohman
the retains and releases all use the same SSA pointer value. Also, don't let CFG hazards disrupt nested retain+release pair optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12Use an actual reverse-CFG reverse-postorder for the bottom-up traversal,Dan Gohman
rather than plain postorder, so that CFG constructs like single-exit loops are reliably visited in a sensible order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137398 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12Simplify the interference checking code a bit.Jakob Stoklund Olesen
This is possible now that we now longer provide an interface to iterate the interference overlaps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM vector compare to zero instruction assembly parsing support.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Allow loop unrolling to get known trip counts from ScalarEvolution.Andrew Trick
SCEV unrolling can unroll loops with arbitrary induction variables. It is a prerequisite for -disable-iv-rewrite performance. It is also easily handles loops of arbitrary structure including multiple exits and is generally more robust. This is under a temporary option to avoid affecting default behavior for the next couple of weeks. It is needed so that I can checkin unit tests for updateUnloop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Remove the InterferenceResult class.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Eliminate the last use of InterferenceResult.Jakob Stoklund Olesen
The Query class now holds two iterators instead of an InterferenceResult instance. The iterators are used as bookmarks for repeated collectInterferingVRegs calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Enclose directive .cprestore with .set macro and nomacro to silence assemblerAkira Hatanaka
warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Remove no-longer-true comments. These are for the assembler, also.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM STRT assembly parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Make the USAT16 operand decoder auto-generate-able.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Add another accidentally omitted predicate operand.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Add missing predicate operand on SMLA and friends.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM load shifted register pre-index fix shift value asm parser encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Handle new register classes in Thumb2 mode. Should fix the ARM buildbots.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Making SEL decodings auto-generate-able.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Add a dag combine to xform 256-bit shuffles into simple vectorBruno Cardoso Lopes
inserts and extracts. This simple combine makes us generate only 1 instruction instead of 11 in the v8 case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Tidy up comment.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137359 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Fix decoding support for STREXD and LDREXD.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Remove more dead code.Jakob Stoklund Olesen
collectInterferingVRegs will be the primary function for interference checks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM STRH assembly parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Fix typos in comments, and delete an unused function.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Add isIndirectBranch flag.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Privatize an unused part of the LiveIntervalUnion::Query interface.Jakob Stoklund Olesen
No clients are iterating over interference overlaps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137347 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Remove some dead code.Jakob Stoklund Olesen
The InterferenceResult iterator turned out to be less important than we thought it would be. LiveIntervalUnion clients want higher level information, like the list of interfering virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Tidy up. Remove unused template parameter.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Improve operand validation for Thumb2 addressing modes.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM STRD assembly parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Fix for LoopInfo::updateUnloop. Remove subloop blocks from formerAndrew Trick
ancestor loops. I have a unit test that depends on scev-unroll, which unfortunately isn't checked in. But I will check it in when I can. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Continue to tighten decoding by performing more operand validation.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Tidy up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM STRBT assembly parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM STR(immediate) assembly parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137325 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Fix PR10492 by teaching MOVHLPS and MOVLPS mask matching to be more strict.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Tighten operand decoding of addrmode2 instruction. The offset register ↵Owen Anderson
cannot be PC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Correct immediate range for shifter operands. Patch by James Molloy, with ↵Owen Anderson
additional encoding fixes added by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Plug a memory leak.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Improve error checking in the new ARM disassembler. Patch by James Molloy.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM push of a single register encodes as pre-indexed STR.Jim Grosbach
Per the ARM ARM, a 'push' of a single register encodes as an STR, not an STM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Cleanup. Another thorough review by Nick!Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11ARM pop of a single register encodes as post-indexed LDR.Jim Grosbach
Per the ARM ARM, a 'pop' of a single register encodes as an LDR, not an LDM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11Add a comment, per Bruno's CR.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11[AVX] When joining two XMM registers into a YMM register, make sure that theNadav Rotem
lower XMM register gets in first. This will allow the SUBREG pattern to elliminate the first vector insertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11[AVX] If the data which is going to be saved is already in two XMM registersNadav Rotem
(for example, after integer operation), do not pack the registers into a YMM before saving. Its better to save as two XMM registers. Before: vinsertf128 $1, %xmm3, %ymm0, %ymm3 vinsertf128 $0, %xmm1, %ymm3, %ymm1 vmovaps %ymm1, 416(%rsp) After: vmovaps %xmm3, 416+16(%rsp) vmovaps %xmm1, 416(%rsp) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11fix PR10605 / rdar://9930964 by adding a pretty scary missed check.Chris Lattner
It's somewhat surprising anything works without this. Before we would compile the testcase into: test: # @test movl $4, 8(%rdi) movl 8(%rdi), %eax orl %esi, %eax cmpl $32, %edx movl %eax, -4(%rsp) # 4-byte Spill je .LBB0_2 now we produce: test: # @test movl 8(%rdi), %eax movl $4, 8(%rdi) orl %esi, %eax cmpl $32, %edx movl %eax, -4(%rsp) # 4-byte Spill je .LBB0_2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137303 91177308-0d34-0410-b5e6-96231b3b80d8
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