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rather than legalization.
This is both the conceptually correct place for it, as well as allowing it to be more aggressive.
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We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.
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just do it earlier too.
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splitting needs them.
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element size. Instead,
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.
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For NEON we had been assuming this was always an immediate constant.
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Makes it more clear that it is just a path manipulation function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118174 91177308-0d34-0410-b5e6-96231b3b80d8
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the code more self-documenting.
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with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.
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value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
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this by using an undef as a pointer.
Fixes rdar://8625016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
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extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118152 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118151 91177308-0d34-0410-b5e6-96231b3b80d8
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easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118148 91177308-0d34-0410-b5e6-96231b3b80d8
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vldr.64 d1, [r0, #-32]
The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118144 91177308-0d34-0410-b5e6-96231b3b80d8
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encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.
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printOperand() asm printer helper functions. rdar://8425198
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parts. Represent the operation mode as an optional operand instead.
rdar://8614429
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1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
"optimize for latency". Call instructions don't have the right latency and
this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
not # of micro-ops since multi-latency instructions is completely executed
even when the predicate is false. Also, some instruction will be "slower"
when they are predicated due to the register def becoming implicit input.
rdar://8598427
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latencies) of loads.
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instructions as isCodeGenOnly in the parent class instead of
sprinkling it throughout the .td files.
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ins/outs list that isn't specified by their asmstring. Previously
the asmmatcher would just force a 0 register into it, which clearly
isn't right. Mark a bunch of ARM instructions that use this as
isCodeGenOnly. Some of them are clearly pseudo instructions (like
t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will
either need to be removed or the asmmatcher will need to be taught
about it (someday).
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threshold given to createFunctionInliningPass().
Both opt -O3 and clang would silently ignore the -inline-threshold option.
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limits on their own.
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is handled with the MC encoder.
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them to something with semantic meaning.
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with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.
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Additionally, move the implementation of appendSuffix to Path.cpp: it is
platform-independent.
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