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2012-04-11Fix a number of problems with ARM fused multiply add/subtract instructions.Evan Cheng
1. The new instruction itinerary entries are not properly described. 2. The asm parser can't handle vfms and vfnms. 3. There were no assembler, disassembler test cases. 4. HasNEON2 has the wrong assembler predicate. rdar://10139676 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11Tweak MachineLICM heuristics for cheap instructions.Jakob Stoklund Olesen
Allow cheap instructions to be hoisted if they are register pressure neutral or better. This happens if the instruction is the last loop use of another virtual register. Only expensive instructions are allowed to increase loop register pressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11Only check for PHI uses inside the current loop.Jakob Stoklund Olesen
Hoisting a value that is used by a PHI in the loop will introduce a copy because the live range is extended to cross the PHI. The same applies to PHIs in exit blocks. Also use this opportunity to make HasLoopPHIUse() non-recursive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154454 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Move the constant-folding support for FP_ROUND in SelectionDAG from the ↵Owen Anderson
one-operand version of getNode() to the two-operand version, since it became a two-operand node at sound point. Zap a testcase that this allows us to completely fold away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154447 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10[tsan] two more compile-time optimizations:Kostya Serebryany
- don't isntrument reads from constant globals. Saves ~1.5% of instrumented instructions on CPU2006 (counting static instructions, not their execution). - don't insrument reads from vtable (which is a global constant too). Saves ~5%. I did not measure the run-time impact of this, but it is certainly non-negative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154444 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Handle llvm.fma.* intrinsics. rdar://10914096Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154439 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Add a comment noting that the fdiv -> fmul conversion won't generateDuncan Sands
multiplication by a denormal, and some tests checking that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154431 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10The MDString class stored a StringRef to the string which was already in aBill Wendling
StringMap. This was redundant and unnecessarily bloated the MDString class. Because the MDString class is a "Value" and will never have a "name", and because the Name field in the Value class is a pointer to a StringMap entry, we repurpose the Name field for an MDString. It stores the StringMap entry in the Name field, and uses the normal methods to get the string (name) back. PR12474 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154429 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Whitespace.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Revert r154396, which looks to be the real culprit behind the bot failures.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154426 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Temporarily revert this patch to see if it brings the buildbots back.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154425 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10[tsan] compile-time instrumentation: do not instrument a read ifKostya Serebryany
a write to the same temp follows in the same BB. Also add stats printing. On Spec CPU2006 this optimization saves roughly 4% of instrumented reads (which is 3% of all instrumented accesses): Writes : 161216 Reads : 446458 Reads-before-write: 18295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154418 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10To ensure that we have more accurate line information for a blockEric Christopher
don't elide the branch instruction if it's the only one in the block, otherwise it's ok. PR9796 and rdar://11215207 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154417 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Revert r154397, which was causing make check failures on the buildbots.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10ARM fix cc_out operand handling for t2SUBrr instructions.Jim Grosbach
We were incorrectly conflating some add variants which don't have a cc_out operand with the mirroring sub encodings, which do. Part of the awesome non-orthogonality legacy of thumb1. Similarly, handling of add/sub of an immediate was sometimes incorrectly removing the cc_out operand for add/sub register variants. rdar://11216577 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154411 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Remove unused variable.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154398 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Fix a dagcombine optimization which assumes that the vsetcc result type is ↵Nadav Rotem
always of the same size as the compared values. This is ture for SSE/AVX/NEON but not for all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154397 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Modify the code that lowers shuffles to blends from using blendvXX to vblendXX.Nadav Rotem
blendv uses a register for the selection while vblend uses an immediate. On sandybridge they still have the same latency and execute on the same execution ports. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Make a somewhat subtle change in the logic of block placement. SometimesChandler Carruth
the loop header has a non-loop predecessor which has been pre-fused into its chain due to unanalyzable branches. In this case, rotating the header into the body of the loop in order to place a loop exit at the bottom of the loop is a Very Bad Idea as it makes the loop non-contiguous. I'm working on a good test case for this, but it's a bit annoynig to craft. I should get one shortly, but I'm submitting this now so I can begin the (lengthy) performance analysis process. An initial run of LNT looks really, really good, but there is too much noise there for me to trust it much. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Transform div to mul with reciprocal only when fp imm is legal.Anton Korobeynikov
This fixes PR12516 and uncovers one weird problem in legalize (workarounded) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154394 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Use the correct section types on Solaris for unwind data on both x86 and x86-64.David Chisnall
Patch by Dmitri Shubin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154391 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Express the number of ULPs in fpaccuracy metadata as a real rather than aDuncan Sands
rational number, eg as 2.5 rather than 5, 2. OK'd by Peter Collingbourne. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154387 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Fix 12513: Loop unrolling breaks with indirect branches.Andrew Trick
Take this opportunity to generalize the indirectbr bailout logic for loop transformations. CFG transformations will never get indirectbr right, and there's no point trying. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154386 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154385 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Make the code slightly more palatable.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Add a constructor for DataRefImpl and remove excess initialization.Danil Malyshev
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154371 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Fix a long standing tail call optimization bug. When a libcall is emittedEvan Cheng
legalizer always use the DAG entry node. This is wrong when the libcall is emitted as a tail call since it effectively folds the return node. If the return node's input chain is not the entry (i.e. call, load, or store) use that as the tail call input chain. PR12419 rdar://9770785 rdar://11195178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154370 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10Don't try to zExt just to check if an integer constant is zero, it mightRafael Espindola
not fit in a i64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10ARM LDR/LDRT has the same encoding collision as STR/STRT.Jim Grosbach
Generalized logic of r154141. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154362 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Have TargetLowering::getPICJumpTableRelocBase return a node that points to theAkira Hatanaka
GOT if jump table uses 64-bit gp-relative relocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09When performing a truncating store, it's possible to rearrange the data Chad Rosier
in-register, such that we can use a single vector store rather then a series of scalar stores. For func_4_8 the generated code vldr d16, LCPI0_0 vmov d17, r0, r1 vadd.i16 d16, d17, d16 vmov.u16 r0, d16[3] strb r0, [r2, #3] vmov.u16 r0, d16[2] strb r0, [r2, #2] vmov.u16 r0, d16[1] strb r0, [r2, #1] vmov.u16 r0, d16[0] strb r0, [r2] bx lr becomes vldr d16, LCPI0_0 vmov d17, r0, r1 vadd.i16 d16, d17, d16 vuzp.8 d16, d17 vst1.32 {d16[0]}, [r2, :32] bx lr I'm not fond of how this combine pessimizes 2012-03-13-DAGCombineBug.ll, but I couldn't think of a way to judiciously apply this combine. This ldrh r0, [r0, #4] strh r0, [r1] becomes vldr d16, [r0] vmov.u16 r0, d16[2] vmov.32 d16[0], r0 vuzp.16 d16, d17 vst1.32 {d16[0]}, [r1, :32] PR11158 rdar://10703339 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Patch r153892 for PR11861 apparently broke an external project (see PR12493).Lang Hames
This patch restores TwoAddressInstructionPass's pre-r153892 behaviour when rescheduling instructions in TryInstructionTransform. Hopefully this will fix PR12493. To refix PR11861, lowering of INSERT_SUBREGS is deferred until after the copy that unties the operands is emitted (this seems to be a more appropriate fix for that issue anyway). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154338 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Update comments and remove unnecessary isVolatile() check.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Fix accidentally constant conditions found by uncommitted improvements to ↵David Blaikie
-Wconstant-conversion. A couple of cases where we were accidentally creating constant conditions by something like "x == a || b" instead of "x == a || x == b". In one case a conditional & then unreachable was used - I transformed this into a direct assert instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Pattern match a setcc of boolean value with 0 as a truncate.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09This patch adds X86 instruction itineraries, which were missed by thePreston Gurd
original patch to add itineraries, to X86InstrArithmetc.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Lower some x86 shuffle sequences to the vblend family of instructions.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Fix a bug in the lowering of broadcasts: ConstantPools need to use the ↵Nadav Rotem
target pointer type. Move NormalizeVectorShuffle and LowerVectorBroadcast into X86TargetLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Remove unnecessary type check when combining and/or/xor of swizzles. Move ↵Craig Topper
some checks to allow better early out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Remove unnecessary 'else' on an 'if' that always returnsCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Optimize code slightly. No functionality change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Replace some explicit checks with asserts for conditions that should never ↵Craig Topper
happen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154305 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09Cleanup and relax a restriction on the matching of global offsets intoChandler Carruth
x86 addressing modes. This allows PIE-based TLS offsets to fit directly into an addressing mode immediate offset, which is the last remaining code quality issue from PR12380. With this patch, that PR is completely fixed. To understand why this patch is correct to match these offsets into addressing mode immediates, break it down by cases: 1) 32-bit is trivially correct, and unmodified here. 2) 64-bit non-small mode is unchanged and never matches. 3) 64-bit small PIC code which is RIP-relative is handled specially in the match to try to fit RIP into the base register. If it fails, it now early exits. This behavior is unchanged by the patch. 4) 64-bit small non-PIC code which is not RIP-relative continues to work as it did before. The reason these immediates are safe is because the ABI ensures they fit in small mode. This behavior is unchanged. 5) 64-bit small PIC code which is *not* using RIP-relative addressing. This is the only case changed by the patch, and the primary place you see it is in TLS, either the win64 section offset TLS or Linux local-exec TLS model in a PIC compilation. Here the ABI again ensures that the immediates fit because we are in small mode, and any other operations required due to the PIC relocation model have been handled externally to the Wrapper node (extra loads etc are made around the wrapper node in ISelLowering). I've tested this as much as I can comparing it with GCC's output, and everything appears safe. I discussed this with Anton and it made sense to him at least at face value. That said, if there are issues with PIC code after this patch, yell and we can revert it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08Optimize code a bit. No functional change intended.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08Silence sign-compare warning.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08Only have codegen turn fdiv by a constant into fmul by the reciprocalDuncan Sands
when -ffast-math, i.e. don't just always do it if the reciprocal can be formed exactly. There is already an IR level transform that does that, and it does it more carefully. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08Simplify code that tries to do vector extracts for shuffles when the mask ↵Craig Topper
width and the input vector widths don't match. No need to check the min and max are in range before calculating the start index. The range check after having the start index is sufficient. Also no need to check for an extract from the beginning differently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08Teach LLVM about a PIE option which, when enabled on top of PIC, makesChandler Carruth
optimizations which are valid for position independent code being linked into a single executable, but not for such code being linked into a shared library. I discussed the design of this with Eric Christopher, and the decision was to support an optional bit rather than a completely separate relocation model. Fundamentally, this is still PIC relocation, its just that certain optimizations are only valid under a PIC relocation model when the resulting code won't be in a shared library. The simplest path to here is to expose a single bit option in the TargetOptions. If folks have different/better designs, I'm all ears. =] I've included the first optimization based upon this: changing TLS models to the *Exec models when PIE is enabled. This is the LLVM component of PR12380 and is all of the hard work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154294 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08Move the TLSModel information into the TargetMachine rather than hidingChandler Carruth
in TargetLowering. There was already a FIXME about this location being odd. The interface is simplified as a consequence. This will also make it easier to change TLS models when compiling with PIE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08EngineBuilder::create is expected to take ownership of the TargetMachine ↵Benjamin Kramer
passed to it. Delete it on error or when we create an interpreter that doesn't need it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154288 91177308-0d34-0410-b5e6-96231b3b80d8
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