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2010-07-11Replace copyRegToReg with copyPhysReg for MBlaze.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Replace copyRegToReg with copyPhysReg for ARM.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Replace copyRegToReg with copyPhysReg for Blackfin.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108077 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg!Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Use COPY in X86FastISel::X86SelectRet.Jakob Stoklund Olesen
Don't try a cross-class copy. That is very unlikely anywy since return value registers are usually register class friendly. (%EAX, %XMM0, etc). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Use COPY for fast-isel bitconvert, but don't create cross-class copies.Jakob Stoklund Olesen
This doesn't change the behavior of SelectBitcast for X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Fix va_arg for doubles. With this patch VAARG nodes always contain theRafael Espindola
correct alignment information, which simplifies ExpandRes_VAARG a bit. The patch introduces a new alignment information to TargetLoweringInfo. This is needed since the two natural candidates cannot be used: * The 's' in target data: If this is set to the minimal alignment of any argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for example. * The getTransientStackAlignment method. It is possible for an architecture to have argument less aligned than what we maintain the stack pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.Jakob Stoklund Olesen
This assumes that the registers can be copied which is probably a safe assumption. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Use COPY in FastISel everywhere it is safe and trivial.Jakob Stoklund Olesen
The remaining copyRegToReg calls actually check the return value (shock!), so we cannot trivially replace them with COPY instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Replace copyRegToReg with copyPhysReg for Mips.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11Replace copyRegToReg with copyPhysReg for Alpha.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Use COPY in targetsJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Only collect subreg extracting copies for later coalescing.Jakob Stoklund Olesen
This also avoids fatal copies from physregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;Dan Gohman
if a block is split (by a custom inserter), the insert point may be in a different block than it was originally. This fixes 32-bit llvm-gcc bootstrap builds, and I haven't been able to reproduce it otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10The accumulator tail recursion transform claims to work for any associativeDuncan Sands
operation, but the way it's implemented requires the operation to also be commutative. So add a check for commutativity (and tweak the corresponding comments). This makes no difference in practice since every associative LLVM instruction is also commutative! Here's an example to show the need for commutativity: the accum_recursion.ll testcase calculates the factorial function. Before the transformation the result of a call is ((((1*1)*2)*3)...)*x while afterwards it is (((1*x)*(x-1))...*2)*1 which clearly requires both associativity and commutativity of * to be equal to the original. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Emit COPY instructions instead of using copyRegToReg in InstrEmitter,Jakob Stoklund Olesen
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination. This switches the bulk of register copies to using COPY, but many less used copyRegToReg calls remain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.Jakob Stoklund Olesen
Based on a patch by Rafael Espíndola. Attempt to make the FpSET_ST1 hack more robust, but we are still relying on FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline asm. We support: FpSET_ST0 INLINEASM FpSET_ST0 FpSET_ST1 INLINEASM with and without kills on the arguments. We don't support: FpSET_ST1 FpSET_ST0 INLINEASM nor FpSET_ST1 INLINEASM Just Don't Do It! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Insert IMPLICIT_DEF instructions at the current insert position, notDan Gohman
at the end of the block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Add parentheses yet again to satisfy GCC's warnings.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman
- Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10An x86 function returns a floating point value in st(0), and we must make sureJakob Stoklund Olesen
it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent the required sideeffect, so insert an FpGET_ST0 instruction directly instead. This will matter when CopyFromReg gets lowered to a generic COPY instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Update DBG_VALUE to refer appropriate stack slot in case of a spill.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Declare YMM subregisters in the right way! Thanks JakobBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Add AVX 256-bit packed MOVNT variantsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Remember the *_TC opcodes for load/storeJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Add AVX 256-bit unpack and interleaveBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Fix small bug in isMoveInstr -> COPY translationJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108013 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Automatically fold COPY instructions into stack load/store.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Fix a few testsJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Remat uncoalescable COPY instrsJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09In the presence of variable sized objects, allocate an emergency spill slot.Jim Grosbach
rdar://8131327 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Clarify what mysterious check means.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Fix MachineLICM to actually visit inner loops.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Start the support for AVX instructions with 256-bit %ymm registers. A couple ofBruno Cardoso Lopes
notes: - The instructions are being added with dummy placeholder patterns using some 256 specifiers, this is not meant to work now, but since there are some multiclasses generic enough to accept them, when we go for codegen, the stuff will be already there. - Add VEX encoding bits to support YMM - Add MOVUPS and MOVAPS in the first round - Use "Y" as suffix for those Instructions: MOVUPSYrr, ... - All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Change TII::foldMemoryOperand API to require the machine instruction to beJakob Stoklund Olesen
inserted in a MBB, and return an already inserted MI. This target API change is necessary to allow foldMemoryOperand to call storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot reference in a target independent way. The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait until COPY folding is actually implemented. Most targets only fold copies and won't need to specialize this hook at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09remove useless cast and fix typos in commentGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09--- Reverse-merging r107947 into '.':Bob Wilson
U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107976 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09cache result of operator*Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107975 91177308-0d34-0410-b5e6-96231b3b80d8
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