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2011-08-09Don't generate the old-style disassembler in CMake builds either.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09The new ARM disassembler disassembles "bx lr" as a special BX_ret ↵Benjamin Kramer
instruction so target specific analysis isn't needed anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Don't continue generating the old-style decoder file.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137150 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09ARM fix typo in pre-indexed store lowering.Jim Grosbach
rdar://9915869 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Attempt to fix CMake build.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137147 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Tighten Thumb1 branch predicate decoding.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Replace the existing ARM disassembler with a new one based on the ↵Owen Anderson
FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Put Darwin-specific code inside an __APPLE__ ifdef.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Revert r137134. It breaks some code as Eli pointed out.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Print out the variable declaration only if it is a declaration. Otherwise, aBill Wendling
'static' variable will be emitted twice. PR10081 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Inflate register classes after coalescing.Jakob Stoklund Olesen
Coalescing can remove copy-like instructions with sub-register operands that constrained the register class. Examples are: x86: GR32_ABCD:sub_8bit_hi -> GR32 arm: DPR_VFP2:ssub0 -> DPR Recompute the register class of any virtual registers that are used by less instructions after coalescing. This affects code generation for the Cortex-A8 where we use NEON instructions for f32 operations, c.f. fp_convert.ll: vadd.f32 d16, d1, d0 vcvt.s32.f32 d0, d16 The register allocator is now free to use d16 for the temporary, and that comes first in the allocation order because it doesn't interfere with any s-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Reapply a more appropriate solution than in r137114. AVX supportsBruno Cardoso Lopes
v4f64 = sitofp v4i32. This fix PR10559. Also add support for v4i32 = fptosi v4f64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Revert r137114Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09PTX: Add initial support for device function callsJustin Holewinski
- Calls are supported on SM 2.0+ for function with no return values git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Move CalculateRegClass to MRI::recomputeRegClass.Jakob Stoklund Olesen
This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Emitting ARM build attributes and values as ULEB, rather than char.Renato Golin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Handle sitofp between v4f64 <- v4i32. Fix PR10559Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Recognize the UNAME_RELEASE environment variable to match Darwin's uname.Bob Wilson
When this variable is set, "uname -r" will return its value instead of the real OS version. Make this affect LLVM's triple for consistency. <rdar://problem/9919167> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09LoopUnroll looks like it has some stale code. Remove it to prove my sanity ↵Andrew Trick
and avoid further confusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Add support for avx vector fextendBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Add AVX versions of 128-bit sitofp and fptosiBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Add two patterns to match special vmovss and vmovsd cases. Also fixBruno Cardoso Lopes
the patterns already there to be more strict regarding the predicate. This fixes PR10558 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09There is only one instance of this placeholder being created. Just use thatBill Wendling
instead of a vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Remove an instance where the 'unwind' instruction was created.Bill Wendling
The 'unwind' instruction was acting essentially as a placeholder, because it would be replaced at the end of this function by a branch to the "unwind handler". The 'unwind' instruction is going away, so use 'unreachable' instead, which serves the same purpose as a placeholder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Print variable's inline location in debug output.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Provide method to print variable's extended name which includes inline location.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Rename member variables to follow coding standards.Jakob Stoklund Olesen
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137094 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Add missing attributes to the C++ backend's output.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137091 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Make LowerVSETCC aware of AVX types and add patterns to match them.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Move the RegisterCoalescer private to its implementation file.Jakob Stoklund Olesen
RegisterCoalescer.h still has the CoalescerPair class interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Refer to the RegisterCoalescer pass by ID.Jakob Stoklund Olesen
A public interface is no longer needed since RegisterCoalescer is not an analysis any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08ARM parsing and encoding for LDRBT instruction.Jim Grosbach
Fix the instruction representation to correctly only allow post-indexed form. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Thumb1 BL instructions encoding 22 bits of displacement, not 21.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137073 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Indicate that there are changes if runOfFunction returns saying that there are.Bill Wendling
Patch by Jingyue! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137072 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Implement isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE for ARM.Jakob Stoklund Olesen
They improve the verbose assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137069 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Add support for several vector shifts operations while in AVX mode. Fix PR10581Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08ARM load/store label parsing.Jim Grosbach
Allow labels for load/store instructions when parsing. There's encoding issues, still, so this doesn't work all the way through, yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Hoist hasLoadFromStackSlot and hasStoreToStackSlot.Jakob Stoklund Olesen
These the methods are target-independent since they simply scan the memory operands. They can live in TargetInstrInfoImpl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Fix encodings for Thumb ASR and LSR immediate operands. They encode the ↵Owen Anderson
range 1-32, with 32 encoded as 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are ↵Eli Friedman
correctly active without HasT2ExtractPack. PR10611. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137061 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Pacify virtual dtor warnings and cmake buildbots.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Add MCInstrAnalysis class. This allows the targets to specify own versions ↵Benjamin Kramer
of MCInstrDescs functions. - Add overrides for ARM. - Teach llvm-objdump to use this instead of plain MCInstrDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Simplify by creating parent first.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137056 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Don't clobber pending ST regs when FP regs are killed.Jakob Stoklund Olesen
X86FloatingPoint keeps track of pending ST registers for an upcoming inline asm instruction with fixed stack register constraints. It does this by remembering which FP register holds the value that should appear at a fixed stack position for the inline asm. When that FP register is killed before the inline asm, make sure to duplicate it to a scratch register, so the ST register still has a live FP reference. This could happen when the same FP register was copied to two ST registers, or when a spill instruction is inserted between the ST copy and the inline asm. This fixes PR10602. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08Remove unnecessary space.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137041 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-07strengthen up an assertion: you can't create a constant structChris Lattner
with an opaque struct type, it doesn't make sense. This should resolve PR10473. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-06Fix typo. Thanks, Andy!Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-06Made SCEV's UDiv expressions more canonical. When dividing aAndrew Trick
recurrence, the initial values low bits can sometimes be ignored. To take advantage of this, added FoldIVUser to IndVarSimplify to fold an IV operand into a udiv/lshr if the operator doesn't affect the result. -indvars -disable-iv-rewrite now transforms i = phi i4 i1 = i0 + 1 idx = i1 >> (2 or more) i4 = i + 4 into i = phi i4 idx = i0 >> ... i4 = i + 4 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-05Reject RS_Spill ranges from local splitting as well.Jakob Stoklund Olesen
All new local ranges are marked as RS_New now, so there is no need to attempt splitting of RS_Spill ranges any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-05Only mark remainder intervals as RS_Spill after per-block splitting.Jakob Stoklund Olesen
The local ranges created get to stay in the RS_New stage, just like for local and region splitting. This gives tryLocalSplit a bit more freedom the first time it sees one of these new local ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137001 91177308-0d34-0410-b5e6-96231b3b80d8
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