aboutsummaryrefslogtreecommitdiff
path: root/lib
AgeCommit message (Collapse)Author
2012-02-24EE/Interpreter/ExternalFunctions.cpp: Staticize lle_X_() entries. They can ↵NAKAMURA Takumi
be mapped in FuncNames[] at the initialization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24EE/Interpreter/ExternalFunctions.cpp: Prune "C" linkage to suppress warnings ↵NAKAMURA Takumi
with -Wreturn-type (and MSC's w4190). In historical reason, Interpreter's external entries had prefix "lle_X_" as C linkage, even for well-known entries in EE/Interpreter. Now, at least on ToT, they are resolved via FuncNames[] mapper. We will not need their symbols are expected to be exported any more. Clang r150128 has introduced the warning <"%0 has C-linkage specified, but returns user-defined type %1 which is incompatible with C">. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24When emitting a cmp with 0 for a lowered select, mask out the highDan Gohman
bits of the value carying the boolean condition, as their contents are undefined. This fixes rdar://10887484. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Allow an integer to be converted into an MMX type when it's used in an inlineBill Wendling
asm. <rdar://problem/10106006> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151303 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Emit global ctors into .CRT$XCU instead of .ctors on Win32. Patch by Joe Groff!Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151289 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Bump SmallString to the minimum required amount for raw_ostream to avoid ↵Benjamin Kramer
allocation. It's is a bit annoying, we should hide this implementation detail better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151284 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23MCize function entry label emission on PowerPC64 properly.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151278 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23BitVectorize loop.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151274 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored ↵Benjamin Kramer
two meaningful states. Rename it to LiveRegs to make it more clear what's stored inside. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151273 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23post-ra-sched: Replace a std::set of regs with a bitvector.Benjamin Kramer
Assuming that a single std::set node adds 3 control words, a bitvector can store (3*8+4)*8=224 registers in the allocated memory of a single element in the std::set (x86_64). Also we don't have to call malloc for every register added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151269 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Updated the llvm-mc disassembler C API to support for the X86 target.Kevin Enderby
rdar://10873652 As part of this I updated the llvm-mc disassembler C API to always call the SymbolLookUp call back even if there is no getOpInfo call back. If there is a getOpInfo call back that is tried first and then if that gets no information then the SymbolLookUp is called. I also made the code more robust by memset(3)'ing to zero the LLVMOpInfo1 struct before then setting SymbolicOp.Value before for the call to getOpInfo. And also don't use any values from the LLVMOpInfo1 struct if getOpInfo returns 0. And also don't use any of the ReferenceType or ReferenceName values from SymbolLookUp if it returns NULL. rdar://10873563 and rdar://10873683 For the X86 target also fixed bugs so the annotations get printed. Also fixed a few places in the ARM target that was not producing symbolic operands for some instructions. rdar://10878166 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Fix the numbering of some of the registers and reclassify a couple of them.Brendon Cahoon
Also, some basic clean up. Patch by Evandro Menezes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151266 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Make calls scheduling boundaries post-ra.Jakob Stoklund Olesen
Before register allocation, instructions can be moved across calls in order to reduce register pressure. After register allocation, we don't gain a lot by moving callee-saved defs across calls. In fact, since the scheduler doesn't have a good idea how registers are used in the callee, it can't really make good scheduling decisions. This changes the schedule in two ways: 1. Latencies to call uses and defs are no longer accounted for, causing some random shuffling around calls. This isn't really a problem since those uses and defs are inaccurate proxies for what happens inside the callee. They don't represent registers used by the call instruction itself. 2. Instructions are no longer moved across calls. This didn't happen very often, and the scheduling decision was made on dubious information anyway. As with any scheduling change, benchmark numbers shift around a bit, but there is no positive or negative trend from this change. This makes the post-ra scheduler 5% faster for ARM targets. The secret motivation for this patch is the introduction of register mask operands representing call clobbers. The most efficient way of handling regmasks in ScheduleDAGInstrs is to model them as barriers for physreg live ranges, but not for virtreg live ranges. That's fine pre-ra, but post-ra it would have the same effect as this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151265 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Reflow code, no functionality change.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Strip a layer of boilerplate from the VLIWPacketizer by storing the ↵Benjamin Kramer
scheduler as an opaque pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151252 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Remove unused variable.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Fix to make sure that a comdat group gets generated correctly for a static ↵Anton Korobeynikov
member of instantiated C++ templates. Patch by Kristof Beyls! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Update for the removal of Hashing.cpp.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Reinstate r151049 now that GeneralHash is fixed.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23The implementation of GeneralHash::addBits broke C++ aliasing rules; fixJay Foad
it with memcpy. This also fixes a problem on big-endian hosts, where addUnaligned would return different results depending on the alignment of the data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23GCC fails to understand that NextBB is always initialized if EvaluateBlockDuncan Sands
returns 'true' and emits a warning. Help it out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151242 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Fix typo.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151238 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23More newline cleanups.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151235 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Add some handy-dandy newlines.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151234 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23misched: cleanup reaching def computationAndrew Trick
Ignore undef uses completely. Use a more explicit SlotIndex API. Add more explicit comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bitsEvan Cheng
of x are zero. This optimizes rev + lsr 16 to rev16. rdar://10750814 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23PostRASched: Convert physreg def/use tracking to Jakob's SparseSet.Andrew Trick
Added array subscript to SparseSet for convenience. Slight reorg to make it easier to manage the def/use sets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Handle regmasks in FixupKills.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Optimize a couple of common patterns involving conditional moves where the falseEvan Cheng
value is zero. Instead of a cmov + op, issue an conditional op instead. e.g. cmp r9, r4 mov r4, #0 moveq r4, #1 orr lr, lr, r4 should be: cmp r9, r4 orreq lr, lr, #1 That is, optimize (or x, (cmov 0, y, cond)) to (or.cond x, y). Similarly extend this to xor as well as (and x, (cmov -1, y, cond)) => (and.cond x, y). It's possible to extend this to ADD and SUB but I don't think they are common. rdar://8659097 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151224 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Handle regmasks in CriticalAntiDepBreaker.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151223 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Track reserved registers separately from RegsAvailable.Jakob Stoklund Olesen
The bulk masking operations from register mask operands don't account for reserved registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22MC: Fix the MCNullStreamer which was broken in r147763.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151213 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Don't compute latencies for regmask operands.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151211 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Handle regmasks in RegisterScavenging.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22misched: Use SparseSet for VRegDegs for constant time clear().Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Allow the use of an alternate symbol for calculating a function's size.Hal Finkel
The standard function epilog includes a .size directive, but ppc64 uses an alternate local symbol to tag the actual start of each function. Until recently, binutils accepted the .size directive as: .size test1, .Ltmp0-test1 however, using this directive with recent binutils will result in the error: .size expression for XXX does not evaluate to a constant so we must use the label which actually tags the start of the function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151200 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Properly emit _fltused with FastISel. Refactor to share code with SDAG.Michael J. Spencer
Patch by Joe Groff! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Comment from code reviewAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Remove extra semi-colons.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151169 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-2280 col.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151167 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Efficient pattern for store truncate. Patch by Evandro Menezes.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Add Foreach LoopDavid Greene
Add some data structures to represent for loops. These will be referenced during object processing to do any needed iteration and instantiation. Add foreach keyword support to the lexer. Add a mode to indicate that we're parsing a foreach loop. This allows the value parser to early-out when processing the foreach value list. Add a routine to parse foreach iteration declarations. This is separate from ParseDeclaration because the type of the named value (the iterator) doesn't match the type of the initializer value (the value list). It also needs to add two values to the foreach record: the iterator and the value list. Add parsing support for foreach. Add the code to process foreach loops and create defs based on iterator values. Allow foreach loops to be matched at the top level. When parsing an IDValue check if it is a foreach loop iterator for one of the active loops. If so, return a VarInit for it. Add Emacs keyword support for foreach. Add VIM keyword support for foreach. Add tests to check foreach operation. Add TableGen documentation for foreach. Support foreach with multiple objects. Support non-braced foreach body with one object. Do not require types for the foreach declaration. Assume the iterator type from the iteration list element type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Remove static ctor.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Support was removed from LLVM's MIPS backend for the PSP variant of thatChandler Carruth
chip in r139383, and the PSP components of the triple are really annoying to parse. Let's leave this chapter behind. There is no reason to expect LLVM to see a PSP-related triple these days, and so no reasonable motivation to support them. It might be reasonable to prune a few of the older MIPS triple forms in general, but as those at least cause no burden on parsing (they aren't both a chip and an OS!), I'm happy to leave them in for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Only add DW_AT_prototyped if we're working with a C-like language.Eric Christopher
Worth another 45k (1%) off of a large C++ testcase. rdar://10909458 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151144 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Add the source language into the compile unit.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Remove extra semi-colon.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Declare register classes as const. Fix a couple pointers to register classes ↵Craig Topper
that weren't already const. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151138 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22misched: DAG builder should not track dependencies for SSA defs.Andrew Trick
The vast majority of virtual register definitions don't need an entry in the DAG builder's VRegDefs set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Initialize SUnits before DAG building.Andrew Trick
Affect on SD scheduling and postRA scheduling: Printing the DAG will display the nodes in top-down topological order. This matches the order within the MBB and makes my life much easier in general. Affect on misched: We don't need to track virtual register uses at all. This is awesome. I also intend to rely on the SUnit ID as a topo-sort index. So if A < B then we cannot have an edge B -> A. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151135 91177308-0d34-0410-b5e6-96231b3b80d8