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2011-08-10While extending definition range of a debug variable, consult lexical scopes ↵Devang Patel
also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Revert unintentional parts of previous check-in.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137249 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Start using LexicalScopes utility. No intetional functionality change.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Fix typo. Not quite sure how that slipped in there.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10ARM LDRD(immediate) assembly parsing and encoding support.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10When performing a truncating store, it is sometimes possible to rearrange theNadav Rotem
data in-register prior to saving to memory. When we reorder the data in memory we prevent the need to save multiple scalars to memory, making a single regular store. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Provide utility to extract and use lexical scoping information from machine ↵Devang Patel
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Add initial support for decoding NEON instructions in Thumb2 mode.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137236 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Comments. Thanks for the spell check Nick!Andrew Trick
Also, my apologies for spoiling the autocomplete on SimplifyInstructions.cpp. I couldn't think of a better filename. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10The following X86 pattern is incorrect:Bruno Cardoso Lopes
def : Pat<(X86Movss VR128:$src1, (bc_v4i32 (v2i64 (load addr:$src2)))), (MOVLPSrm VR128:$src1, addr:$src2)>; This matches a MOVSS dag with a MOVLPS instruction. However, MOVSS will replace only the low 32 bits of the register, while the MOVLPS instruction will replace the low 64 bits. A testcase is added and illustrates the bug and also modified the one that was already present. Patch by Tanya Lattner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137227 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Whitespace.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Tabs --> spaces.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Cleanups based on Nick Lewycky's feedback.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137224 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Rewrite some ARM InstrInfo functions to be most accepting of arbitrary ↵Owen Anderson
register subclasses. Hopefully this fixes some buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137223 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Add support for the R and Q constraints.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137217 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Clarify a comment.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137204 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Invoke SimplifyIndVar when we partially unroll a loop. Fixes PR10534.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Cleanup. Make ScalarEvolution an explicit argument of theAndrew Trick
SimplifyIndVar utility since it is required. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10SimplifyIndVar: make foldIVUser iterative to fold a chain of operands.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Update CMake build.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Added a SimplifyIndVar utility to simplify induction variable usersAndrew Trick
based on ScalarEvolution without changing the induction variable phis. This utility is the main tool of IndVarSimplifyPass, but the pass also restructures induction variables in strange ways that are sensitive to pass ordering. This provides a way for other loop passes to simplify new uses of induction variables created during transformation. The utility may be used by any pass that preserves ScalarEvolution. Soon LoopUnroll will use it. The net effect in this checkin is to cleanup the IndVarSimplify pass by factoring out the SimplifyIndVar algorithm into a standalone utility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Cleanup. Added LoopBlocksDFS::perform for simple clients.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137195 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Fix a bug in vpermilps mask checking. Fix PR10560Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Fix the LoopUnroller to handle nontrivial loops and partial unrolling.Andrew Trick
These are not individual bug fixes. I had to rewrite a good chunk of the unroller to make it sane. I think it was getting lucky on trivial completely unrolled loops with no early exits. I included some fairly simple unit tests for partial unrolling. I didn't do much stress testing, so it may not be perfect, but should be usable now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Push GPRnopc through a large number of instruction definitions to tighten ↵Owen Anderson
operand decoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Trim an unneeded header.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Promote VMOVS to VMOVD when possible.Jakob Stoklund Olesen
On Cortex-A8, we use the NEON v2f32 instructions for f32 arithmetic. For better latency, we also send D-register copies down the NEON pipeline by translating them to vorr instructions. This patch promotes even S-register copies to D-register copies when possible so they can also go down the NEON pipeline. Example: vldr.32 s0, LCPI0_0 loop: vorr d1, d0, d0 loop2: ... vadd.f32 d1, d1, d16 The vorr instruction looked like this after regalloc: %S2<def> = COPY %S0, %D1<imp-def> Copies involving odd S-registers, and copies that don't define the full D-register are left alone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Tighten operand checking of register-shifted-register operands.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137180 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Tighten operand checking on memory barrier instructions.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09VMCore/BasicBlock.cpp: Don't assume BasicBlock::iterator might end with a ↵NAKAMURA Takumi
non-PHInode Instruction in successors. Frontends(eg. clang) might pass incomplete form of IR, to step off the way beyond iterator end. In the case I had met, it took infinite loop due to meeting bogus PHInode. Thanks to Jay Foad and John McCall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Fix whitespace.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Tighten operand checking on CPS instructions.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Representation of 'atomic load' and 'atomic store' in IR.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Create a new register class for the set of all GPRs except the PC. Use it ↵Owen Anderson
to tighten our decoding of BFI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137168 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Add v16i16 and v32i8 store patternsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137166 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Fix 80-column violations.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Use fp unpack instructions to unpack int types. Until we have AVX2, thisBruno Cardoso Lopes
is the best we can do for these patterns. This fix PR10554. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137161 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Fix a couple ridiculous copy-paste errors. rdar://9914773 .Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Add a C interface to PassManagerBuilder. It is missing the addExtensionRafael Espindola
functionality since in the C api a pass is created and added to a pass manager in a single call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137159 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Don't truncate MachO addresses.Jim Grosbach
Assigned symbol addresses get truncated to 32-bits, even on 64-bit platforms. That's obviously bogus. For example, .globl _foo .equ _foo, 0x987654321ULL rdar://9922863 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09ARM Disassembler: sign extend branch immediates.Benjamin Kramer
Not sure about BLXi, but this is what the old disassembler did. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137156 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Silence an false-positive warning.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137154 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Don't generate the old-style disassembler in CMake builds either.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09The new ARM disassembler disassembles "bx lr" as a special BX_ret ↵Benjamin Kramer
instruction so target specific analysis isn't needed anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Don't continue generating the old-style decoder file.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137150 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09ARM fix typo in pre-indexed store lowering.Jim Grosbach
rdar://9915869 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Attempt to fix CMake build.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137147 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Tighten Thumb1 branch predicate decoding.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Replace the existing ARM disassembler with a new one based on the ↵Owen Anderson
FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8
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