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2011-08-24Basic x86 code generation for atomic load and store instructions.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Use getFirstInsertionPt instead of getFirstNonPHI so that it skips to the properBill Wendling
insertion place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138473 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the new api.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predicate.Jim Grosbach
rdar://10015134 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138467 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Mark VZEROALL as clobbering all YMM registersBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138461 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Add missing explicit writeback operand to tSTMIA_UPD.Jim Grosbach
rdar://10014745 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng
These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Fix a crashing bug in SplitBlock when it is called on a block with noRafael Espindola
dominator information even though dominators were previously computed. Patch by Nick Sumner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Thumb add SP assembly syntax fix.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach
Add the predicate operand to the instructions. Update the back end accordingly where the instructions are used. Restrict the SP operands to actually only be SP, as otherwise these break assembly parsing for the normal instruction variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Be stricter in enforcing IT instruction predicate values, so that we don't ↵Owen Anderson
end up trying to print out an illegal predicate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Tidy up. Trailing whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138437 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Add Uses=[SP] to call instructions. This fixes a miscompilation with aRichard Osborne
variable sized alloca. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid ↵Craig Topper
costly scalarization. Fixes PR10711. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Add the sentinal "no handle" value to the ResumeInst.Bill Wendling
A value of -1 at a call site tells the personality function that this call isn't handled by the current function. Since the ResumeInsts are converted to calls to _Unwind_SjLj_Resume, add a (volatile) store of -1 to its 'call site'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138416 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Don't replace *all* uses with the new stuff.Bill Wendling
This is not necessarily the first or dominating use of the EH values. The IR breaks if it's not. So replace the specific value in the instruction with the new value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Look at the end of the entry block for an invoke.Bill Wendling
The invoke could be at the end of the entry block. If it's the only one, then we won't process all of the landingpad instructions correctly. This code is currently ugly, but should be made much nicer once the new EH switch is thrown. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Fix a nasty bug where a v4i64 was being wrong emitted with 32-bitBruno Cardoso Lopes
permutations. Also tidy up some patterns and make them close to their instruction definition! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138392 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23A landingpad instruction is neither folded nor dead.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Move ARM frame-unwinding EHABI handling a touch earlier.Jim Grosbach
It should go before AsmPrinter MC pseudo expansion since it's based on MachineInstr, not MCInst. Otherwise any frame related pseudo instructions may be missed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23[SU]XT[BH] are only available on ARMv6 and up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Add some useful accessors to c++ api that appear to be missing from the c apiNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Some refactoring so TargetRegistry.h no longer has to include any filesEvan Cheng
from MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Revert "Address Duncan's CR request:"Eric Christopher
This reverts commit 20a05be15ea5271ab6185b83200fa88263362400. (svn rev 138340) Conflicts: test/Transforms/InstCombine/bitcast.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Thumb parsing and encoding for SVC.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Fix 80 col violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23PerformSubCombine to work on integers larger than i128. Fixes a crasher.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Thumb parsing and encoding for tSTRspi.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Thumb parsing and encoding for STM.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Factor low reg checking into a helper function.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Fix decoding of Thumb2 prefetch instructions, which account for all the ↵Owen Anderson
remaining Thumb2 decoding failures found by randomized testing so far. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Address Duncan's CR request:Nadav Rotem
1. Cleanup the tests in ConstantFolding.cpp 2. Implement isAllOnes for Constant, ConstantFP, ConstantVector git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same ↵Owen Anderson
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Clean up Thumb load/store multiple definitions.Jim Grosbach
There is no non-writeback store multiple instruction in Thumb1, so don't define one. As a result load multiple is the only instantiation of the multiclass, so refactor that away entirely. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Fix two more instances of mis-matched operand names breaking disassembly. ↵Owen Anderson
Found by randomized testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23This patch adds support of le32 pseudo-cpu that stands for genericIvan Krasin
32-bit little-endian CPU. Used by PNaCl and Emscripten. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ↵Craig Topper
ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23lib/Support/Windows/Windows.h: Update required IE ver. 0x0600 should be ↵NAKAMURA Takumi
enough for Windows XP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Introduce a pass to insert vzeroupper instructions to avoid AVX toBruno Cardoso Lopes
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper" llc command line option. This is only the first step (very naive and conservative one) to sketch out the idea, but proper DFA is coming next to allow smarter decisions. Comments and ideas now and in further commits will be very appreciated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Thumb parsing and encoding for SBC.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Thumb parsing and encoding for RSB.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Reject invalid imod values in t2CPS instructions.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138306 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Split the landing pad's edge. Then for all uses of a landingpad instruction'sBill Wendling
value, we insert a load of the exception object and selector object from memory, which is where it actually resides. If it's used by a PHI node, we follow that to where it is being used. Eventually, all landingpad instructions should have no uses. Any PHI nodes that were associated with those landingpads should be removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22t2SMLAD is a four-register instruction, not a three-register one.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Correct operand naming of t2USAT16 to allow proper decoding.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Revert r138278 now that r138289 has fixed the root issue.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Match operand naming to allow correct decoding of t2LDRSH_POST.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Improve error checking for tPUSH and tPOP register lists.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Match operand names to provide correct decoding for Thumb2 SMULL.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Provide a correct decoder hook for Thumb2 shifted registers. Found by ↵Owen Anderson
randomized testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138292 91177308-0d34-0410-b5e6-96231b3b80d8
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