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2011-10-05Add braces around something that throws me for a loop.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141173 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05There is no point in setting out-parameters for a ComplexPattern function whenCameron Zwarich
it returns false, at least as far as I could tell by reading the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Also update the EH with bitcode. I missed this earlier. Thanks to Duncan for ↵Bill Wendling
pointing it out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Fix a broken assert found by -Wparentheses.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141168 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Fix disabled SCEV analysis caused r141161 and add unit test.Andrew Trick
I noticed during self-review that my previous checkin disabled some analysis. Even with the reenabled analysis the test case runs in about 5ms. Without the fix, it will take several minutes at least. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Add more initializers to quiet a clang warning.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Change C++ style comments to C style comments in X86 disassembler. Patch ↵Craig Topper
from Joe Abbey. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141162 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Avoid exponential recursion in SCEV getConstantEvolvingPHI and ↵Andrew Trick
EvaluateExpression. Note to compiler writers: never recurse on multiple instruction operands without memoization. Fixes rdar://10187945. Was taking 45s, now taking 5ms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141161 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Insert space.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Do not examine variadic or implicit operands if instruction is a return (jr).Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141157 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Clean up function Filler::delayHasHazard. Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141156 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Remove function Filler::insertCallUses.Akira Hatanaka
Record the registers used and defined by a call in Filler::insertDefsUses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141154 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Clean up Filler::findDelayInstr.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141152 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Remove function Filler::isDelayFiller. Check if I is the same instruction thatAkira Hatanaka
filled the last delay slot visited. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Clean up Filler::runOnMachineBasicBlock. Change interface ofAkira Hatanaka
Filler::findDelayInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141150 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Define a statistic for the number of slots that were filled with useful Akira Hatanaka
instructions (instructions that are not NOP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141149 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Remove unnecessary check. isDelayFiller(MBB, I) will evaluate to true beforeAkira Hatanaka
I->getDesc().hasDelaySlot() does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Add comments and move assignment statement. If sawStore is true, sawLoad doesAkira Hatanaka
not have to be set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141147 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Correct description string of enable-mips-delay-filler.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Look at the number of entries in the jump table and jump to a 'trap' block ifBill Wendling
the value exceeds that number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Checkpoint for SJLJ EH code.Bill Wendling
This is a first pass at generating the jump table for the sjlj dispatch. It currently generates something plausible, but hasn't been tested thoroughly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Also add <imp-use,kill> flags for redefined super-registers.Jakob Stoklund Olesen
For example: %vreg10:dsub_0<def,undef> = COPY %vreg1 %vreg10:dsub_1<def> = COPY %vreg2 is rewritten as: %D2<def> = COPY %D0, %Q1<imp-def> %D3<def> = COPY %D1, %Q1<imp-use,kill>, %Q1<imp-def> The first COPY doesn't care about the previous value of %Q1, so it doesn't read that register. The second COPY is a partial redefinition of %Q1, so it implicitly kills and redefines that register. This makes it possible to recognize instructions that can harmlessly clobber the full super-register. The write and don't read the super-register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Also add <def,undef> flags when coalescing sub-registers.Jakob Stoklund Olesen
RegisterCoalescer can create sub-register defs when it is joining a register with a sub-register. Add <undef> flags to these new sub-register defs where appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141138 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Teach the MC to output code/data region marker labels in MachO and ELF ↵Owen Anderson
modes. These are used by disassemblers to provide better disassembly, particularly on targets like ARM Thumb that like to intermingle data in the TEXT segment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Adding back support for printing operands symbolically to ARM's new disassemblerKevin Enderby
using llvm's public 'C' disassembler API now including annotations. Hooked this up to Darwin's otool(1) so it can again print things like branch targets for example this: blx _puts instead of this: blx #-36 and includes support for annotations for branches to symbol stubs like: bl 0x40 @ symbol stub for: _puts and annotations for pc relative loads like this: ldr r3, #8 @ literal pool for: Hello, world! Also again can print the expression encoded in the Mach-O relocation entries for things like this: movt r0, :upper16:((_foo-_bar)+1234) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141129 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Create a mapping between the landing pad basic block and the call site index ↵Bill Wendling
for later use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Allow <undef> flags on def operands as well as uses.Jakob Stoklund Olesen
The <undef> flag says that a MachineOperand doesn't read its register, or doesn't depend on the previous value of its register. A full register def never depends on the previous register value. A partial register def may depend on the previous value if it is intended to update part of a register. For example: %vreg10:dsub_0<def,undef> = COPY %vreg1 %vreg10:dsub_1<def> = COPY %vreg2 The first copy instruction defines the full %vreg10 register with the bits not covered by dsub_0 defined as <undef>. It is not considered a read of %vreg10. The second copy modifies part of %vreg10 while preserving the rest. It has an implicit read of %vreg10. This patch adds a MachineOperand::readsReg() method to determine if an operand reads its register. Previously, this was modelled by adding a full-register <imp-def> operand to the instruction. This approach makes it possible to determine directly from a MachineOperand if it reads its register. No scanning of MI operands is required. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Replace snprintf with raw_string_ostream.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Allow Operator ArgumentsDavid Greene
When resolving an operator list element reference, resolve all operator operands and try to fold the operator first. This allows the operator to collapse to a list which may then be indexed. Before, it was not possible to do this: class D<int a, int b> { ... } class C<list<int> A> : D<A[0], A[1]>; class B<list<int> b> : C<!foreach(...,b)>; Now it is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Unbreak CMake build.Ted Kremenek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Put GCOVFile and other related interface in a common header so that llvm-cov ↵Devang Patel
tool can share it with GCOV writer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Unbreak MSVC build.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Teach PPCInstrInfo to handle sub-classes.Jakob Stoklund Olesen
This has already been done for most other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04tblgen: add preprocessor as a separate modeChe-Liang Chiou
This patch adds a preprocessor that can expand nested for-loops for saving some copy-n-paste in *.td files. The preprocessor is not yet integrated with TGParser, and so it has no direct effect on *.td inputs. However, you may preprocess an td input (and only preprocess it). To test the proprecessor, type: tblgen -E -o $@ $< git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Set operation actions to legal types only.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141075 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Operations should be custom lowered only if their type is legal.Nadav Rotem
Test: CellSPU/v2i32.ll when running with -promote-elements git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04The product of two chrec's can always be represented as a chrec.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Add support in the disassembler for ignoring the L-bit on certain VEX ↵Craig Topper
instructions. Mark instructions that have this behavior. Fixes PR10676. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04LSR should avoid redundant edge splitting.Andrew Trick
This handles the case in which LSR rewrites an IV user that is a phi and splits critical edges originating from a switch. Fixes <rdar://problem/6453893> LSR is not splitting edges "nicely" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141058 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Remove last references to hotpatch.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Generic cleanup.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03ARM assembly parsing and encoding for VMOV immediate.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Tidy up. 80 columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141043 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Use the PC label ID rather than '1'. Add support for thumb-2, because I ↵Bill Wendling
heard that some people use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Don't carry over the dispatchsetup hack from the old system.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03ARM parsing/encoding for VCMP/VCMPE.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141038 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Fix typo in comments.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141032 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Check-pointing the new SjLj EH lowering.Bill Wendling
This code will replace the version in ARMAsmPrinter.cpp. It creates a new machine basic block, which is the dispatch for the return from a longjmp call. It then shoves the address of that machine basic block into the correct place in the function context so that the EH runtime will jump to it directly instead of having to go through a compare-and-jump-to-the-dispatch bit. This should be more efficient in the common case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Add support for 64-bit logical NOR.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141029 91177308-0d34-0410-b5e6-96231b3b80d8
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