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2011-09-27Split the landing pad basic block with the correct function. Also merge theBill Wendling
split landingpad instructions into a PHI node. PR11016 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27Disable LSR retry by default.Andrew Trick
Disabling aggressive LSR saves compilation time, and with the new indvars behavior usually improves performance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26LSR, one of the new Cost::isLoser() checks did not get merged in the ↵Andrew Trick
previous checkin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26Remove extraneous commit garbage.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26LSR cost metric minor fix and verification.Andrew Trick
The minor bug heuristic was noticed by inspection. I added the isLoser/isValid helpers because they will become more important with subsequent checkins. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140580 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26Set register class of a register according to value of HasMips64.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26Define variable HasMips64 in MipsTargetLowering.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26In single float mode, double precision FP arguments are passed in integerAkira Hatanaka
registers, so there is no need to check here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26Enhance alias analysis for atomic instructions a bit. Upgrade a couple ↵Eli Friedman
alias-analysis tests to the new atomic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Fix memcpy intrinsic to handle 64-bit pointersJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Implement PTXSelectionDAGInfoJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140549 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Implement ISD::ANY_EXTENDJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Fix detection of stack load/store vs. global load/store, as well as fix theJustin Holewinski
printing of local offsets git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26Fix emission of debug data for global variables. getContext() on ↵James Molloy
DIGlobalVariables is not valid any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: SM > 2.0 implies +doubleJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Fix some lingering issues with stack allocationJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Split up the TableGen instruction definitions into logical unitsJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Unify handling of loads/storesJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PTX: Handle FrameIndex nodesJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL ↵David Meyer
2011-06-09-TailCallByVal and 2010-11-04-BigByval git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26Fix VEX decoding in i386 mode. Fixes PR11008.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25Add target hook for pseudo instruction expansion.Jakob Stoklund Olesen
Many targets use pseudo instructions to help register allocation. Like the COPY instruction, these pseudos can be expanded after register allocation. The early expansion can make life easier for PEI and the post-ra scheduler. This patch adds a hook that is called for all remaining pseudo instructions from the ExpandPostRAPseudos pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25[vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENTNadav Rotem
SDNodes may return values which are wider than the incoming element types. In this patch we fix the integer promotion of these nodes. Fixes spill-q.ll when running -promote-elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos.Jakob Stoklund Olesen
No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25Rename LowerSubregs to ExpandPostRAPseudos.Jakob Stoklund Olesen
I'll fix the file contents in the next commit. This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I am going to add a hook so targets can expand more pseudo-instructions after register allocation. Many targets have pseudo-instructions that assist the register allocator. They can be expanded after register allocation, before PEI and PostRA scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24Sort CMakeLists.txt.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140465 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24Implement Duncan's suggestion to use the result of getSetCCResultType if it ↵Nadav Rotem
is legal (this is always the case for scalars), otherwise use the promoted result type. Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24[Vector-Select] Address one of the problems in 10902.Nadav Rotem
When generating the trunc-store of i1's, we need to use the vector type and not the scalar type. This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when running with -promote-elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24Add .td file.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140446 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24Preparation for adding simple Mips64 instructions.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24Only run MF.verify() with EXPENSIVE_CHECKS=1.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23sys::Process: Add a SetWorkingDirectory method.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23LSR minor bug fix in RateRegister.Andrew Trick
No test case. Noticed by inspection and I doubt it ever affects the outcome of the overall heuristic, let alone final codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Verify that terminators follow non-terminators.Jakob Stoklund Olesen
This exposes a -segmented-stacks bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23PR10998: It is not legal to sink an instruction past the terminator of a ↵Eli Friedman
block; make sure we don't do that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140428 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset ↵Owen Anderson
of #-0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Also match negative offsets for addrmode3 and addrmode5.Jakob Stoklund Olesen
Math is hard, and isScaledConstantInRange() always returned false for negative constants. It was doing unsigned division of negative numbers before casting back to signed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140425 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Add more fixed bits to USAT16 encoding to filter out incorrect decodings.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Post-index loads/stores in still need to print the post-indexed immediate, ↵Owen Anderson
even if it's zero, to distinguish them from non-post-indexed instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid ↵Owen Anderson
testcases updated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Revert r140412. This affects more instructions than intended.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Thumb2 register-shifted-register loads cannot target the PC or the SP.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Implement N32/64 calling convention. Patch by Liu.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Make FGR64RegisterClass available if target is Mips64.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Add definitions of 64-bit register files. Add code for returning Mips64's ↵Akira Hatanaka
sets of callee-saved registers and reserved registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140395 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23PTX: Fix parameter order bugJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140394 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23Fix a couple of 80 column violations.Wesley Peck
patch contributed by Jia Liu! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140391 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23PTX: Cleanup unused code in PTXMachineFunctionInfoJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23PTX: Fix another 80-column violationJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140387 91177308-0d34-0410-b5e6-96231b3b80d8
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