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2008-11-21Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"Bill Wendling
because the boolean it returns to indicate an overflow may not be treated like as a flag. It could be stored to memory, for instance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59780 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Implement the sadd_with_overflow intrinsic. This is converted intoBill Wendling
"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the addition and then checks if the result is less than one of the operands. (If it is, then there was an overflow.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Fix unused variable warnings.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59778 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Use ComputeLatency in the MachineInstr scheduler.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59777 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Remove the CycleBound computation code from the ScheduleDAGRRListDan Gohman
schedulers. This doesn't have much immediate impact because targets that use these schedulers by default don't yet provide pipeline information. This code also didn't have the benefit of register pressure information. Also, removing it will avoid problems with list-burr suddenly starting to do latency-oriented scheduling on x86 when we start providing pipeline data, which would increase spilling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59775 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Implement ComputeLatency for MachineInstr ScheduleDAGs. FactorDan Gohman
some of the latency computation logic out of the SDNode ScheduleDAG code into a TargetInstrItineraries helper method to help with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59761 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Add UADDO and SADDO nodes. These will be used for determining an overflowBill Wendling
condition in an addition operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59760 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Change these schedulers to not emit no-ops. It turns out thatDan Gohman
the RR scheduler actually does look at latency values, but it doesn't use a hazard recognizer so it has no way to know when a no-op is needed, as opposed to just stalling and incrementing the cycle count. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59759 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Fix error where it wasn't getting the correct caller function.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59758 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21If the function being inlined has a higher stack protection level than theBill Wendling
inlining function, then increase the stack protection level on the inlining function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59757 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Treat mid-block labels the same as terminators when building theDan Gohman
MachineInstr scheduling DAG, meaning they implicitly depend on all preceding defs. This fixes Benchmarks/Shootout-C++/except and Regression/C++/EH/simple_rethrow in -relocation-model=pic -disable-post-RA-scheduler=false mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59747 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Add another machine-code printing pass when post-pass scheduling is run.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Don't forget arguments!Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59745 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20CellSPU:Scott Michel
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy. (b) Remove truncated stores that will never be used. (c) Add initial support for __muldi3 as a libcall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Add some documentation.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59727 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Allow XMM2 and XMM3 to be used for non ABI compliant code.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59720 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-2080-column violation.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59718 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20CellSPU: Custom lower truncating stores of i8 to i1 (should not have beenScott Michel
promote), fix signed conversion of indexed offsets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59707 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20undef beats zero. Fix this missed optimization opportunity. Patch by Matt Elder!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59705 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20CellSPU: Adjust spacing/tabulationScott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Remove a remnant of list-burr's fast mode.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59702 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Factor out the SethiUllman numbering logic from the list-burr andDan Gohman
list-tdrr schedulers into a common base class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59701 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Remove the "fast" form of the list-burr scheduler, and use theDan Gohman
dedicated "fast" scheduler in -fast mode instead, which is faster. This speeds up llc -fast by a few percent on some testcases -- the speedup only happens for code not handled by fast-isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Facter AddPseudoTwoAddrDeps and associated infrasructure out ofDan Gohman
the list-burr scheduler so that it can be used by the list-tdrr scheduler too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59698 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20- Register scavenger should use MachineRegisterInfo and internal map to find ↵Evan Cheng
the first use of a register after a given machine instruction. - When scavenging a register, in addition to the spill, insert a restore before the first use. - Abort if client is looking to scavenge a register even when a previously scavenged register is still live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59697 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Add #include <climits> to get the definition of INT_MAX.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Factor out the code for verifying the work of the scheduler,Dan Gohman
extend it a bit, and make use of it in all schedulers, to ensure consistent checking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59689 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Do not forget llvm.dbg.declare's first argument while removing debugging ↵Devang Patel
information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59688 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Simplify this code a little. In the fast scheduler, CreateNewSUnitDan Gohman
and CreateClone don't add any extra value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59679 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Eliminate a compile time warning.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59678 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Eliminate a compile time warning.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Experimental post-pass scheduling support. Post-pass schedulingDan Gohman
is currently off by default, and can be enabled with -disable-post-RA-scheduler=false. This doesn't have a significant impact on most code yet because it doesn't yet do anything to address anti-dependencies and it doesn't attempt to disambiguate memory references. Also, several popular targets don't have pipeline descriptions yet. The majority of the changes here are splitting the SelectionDAG-specific code out of ScheduleDAG, so that ScheduleDAG can be moved to libLLVMCodeGen.a. The interface between ScheduleDAG-using code and the rest of the scheduling code is somewhat rough and will evolve. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Move the code for printing a graph node label for an SUnit intoDan Gohman
a virtual method of SelectionDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Convert SUnit's dump method into a print method and implementDan Gohman
dump in terms of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59665 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19CMake: Removed source file.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Do not use separate utility to walk all instructions and remove dead dbg ↵Devang Patel
intrinsics. Let instcombiner do this job. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59659 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Let instcombiner remove redundant dbg intrinsics.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59658 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19If there are two consecutive llvm.dbg.stoppoint calls thenDevang Patel
it is likely that the optimizer deleted code in between these two intrinsics. Keep only the last llvm.dbg.stoppoint in this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19CMake: Removed source file from lib/Target/PIC16/CMakeLists.txt.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59655 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19CellSPU: Do not custom lower i1 stores, rely on type legalization to do theScott Michel
right thing and promote the store to i8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59648 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19<rdar://problem/6351057>Stuart Hastings
Discourage (allocate last) use of x86_64 R12 and R13 due to their longer instruction encodings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Temporary check-in for Duncan to demonstrate CellSPU store problem.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59637 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Fix compilation error on MSVC.Argyrios Kyrtzidis
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59629 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Forgot to add this in the previous commit.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Fixed build warnings.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59621 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Added a more function PIC16 backend. However to get this working a patch inSanjiv Gupta
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59617 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Use stripPointerCasts when checking for AllocaInsts for the stackprotector ↵Bill Wendling
intrinsic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59614 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Add support for rematerialization in pre-alloc-splitting.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59587 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Rearrange code to reduce the nesting level. No functionality change.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59580 91177308-0d34-0410-b5e6-96231b3b80d8
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