aboutsummaryrefslogtreecommitdiff
path: root/lib
AgeCommit message (Collapse)Author
2011-03-24s/UpdateDT/ModifiedDT/gDevang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets.NAKAMURA Takumi
FIXME: Some cleanups would be needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128206 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24Nasty bug in ARMBaseInstrInfo::produceSameValue(). The MachineConstantPoolEntryEvan Cheng
entries being compared may not be ARMConstantPoolValue. Without checking whether they are ARMConstantPoolValue first, and if the stars and moons are aligned properly, the equality test may return true (when the first few words of two Constants' values happen to be identical) and very bad things can happen. rdar://9125354 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24Remove all uses of PATH_MAX and MAXPATHLEN from PathV2.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24Do early taildup of ret in CodeGenPrepare for potential tail calls that have aCameron Zwarich
void return type. This fixes PR9487. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24Use an early return instead of a long if block.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24When UpdateDT is set, DT is invalid, which could cause problems when trying toCameron Zwarich
use it later. I couldn't make a test that hits this with the current code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128195 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24Check for TLI so that -codegenprepare can be used from opt.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24CPS3p: Let's reject impossible imod values by returning false from the ↵Johnny Chen
DisassembleMiscFrm() function. Fixed rdar://problem/9179416 ARM disassembler crash: "Unknown imod operand" (fuzz testing) Opcode=98 Name=CPS3p Format=ARM_FORMAT_MISCFRM(26) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- | 1: 1: 1: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 1| 1: 1: 0: 0| 1: 0: 0: 1| 0: 0: 1: 1| ------------------------------------------------------------------------------------------------- Before: cpsUnknown imod operand UNREACHABLE executed at /Volumes/data/lldb/llvm/lib/Target/ARM/InstPrinter/../ARMBaseInfo.h:123! After: /Volumes/data/Radar/9179416/mc-input-arm.txt:1:1: warning: invalid instruction encoding 0x93 0x1c 0x2 0xf1 ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24Load/Store Multiple:Johnny Chen
These instructions were changed to not embed the addressing mode within the MC instructions We also need to update the corresponding assert stmt. Also add two test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24STRT and STRBT was incorrectly tagged as IndexModeNone during the ↵Johnny Chen
refactorings (r119821). We now tag them as IndexModePost. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24The r128103 fix to cope with the removal of addressing modes from the MC ↵Johnny Chen
instructions were incomplete. The assert stmt needs to be updated and the operand index incrment is wrong. Fix the bad logic and add some sanity checking to detect bad instruction encoding; and add a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Runtime dylib simple ARM 24-bit branch relocation support.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Enable GlobalMerge on darwin.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Revert r128175.Andrew Trick
I'm backing this out for the second time. It was supposed to be fixed by r128164, but the mingw self-host must be defeating the fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Cmp peephole optimization isn't always safe for signed arithmetics.Evan Cheng
int tries = INT_MAX; while (tries > 0) { tries--; } The check should be: subs r4, #1 cmp r4, #0 bgt LBB0_1 The subs can set the overflow V bit when r4 is INT_MAX+1 (which loop canonicalization apparently does in this case). cmp #0 would have cleared it while not changing the N and Z bits. Since BGT is dependent on the V bit, i.e. (N == V) && !Z, it is not safe to eliminate the cmp #0. rdar://9172742 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.Eli Friedman
Also cleaning up some duplicated code while I'm here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Reapply Eli's r127852 now that the pre-RA scheduler can spill EFLAGS.Andrew Trick
(target-specific branchless method for double-width relational comparisons on x86) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Split out relocation resolution into target-specific bits.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128173 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23The high bit of a Thumb2 ADR's offset is stored in bit 26, not bit 25.Owen Anderson
This fixes 464.h264ref with the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Fix double-free of Module.Jim Grosbach
The ExecutionEngine constructor already added the module, so there's no need to call addModule() directly. Doing so causes a double-free of the Module at program termination. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Fix a bug introduced by my patch yesterday: BL is a 4-byte instructions like ↵Owen Anderson
BLX, rather than a 2-byte instruction like B. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Ensure that def-side physreg copies are scheduled above any other usesAndrew Trick
so the scheduler can't create new interferences on the copies themselves. Prior to this fix the scheduler could get stuck in a loop creating copies. Fixes PR9509. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Start of relocation resolution for the runtime dyld library.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128161 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Make sure to report any errors from the runtime dyld.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Don't coalesce identical DBG_VALUE instructions prematurely.Jakob Stoklund Olesen
Each of these instructions may have a RegsClobberInsn entry that can't be ignored. Consecutive ranges are coalesced later when DwarfDebug::emitDebugLoc merges entries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23PTX: Improve support for 64-bit addressingJustin Holewinski
- Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses - Add comparison selection for i64 - Add zext selection for i32 -> i64 - Add shl/shr/sha support for i64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Revert r128140 for now.Anders Carlsson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128149 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Fix PR9464 by correcting some math that just happened to be right in most casesCameron Zwarich
that were hit in practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Notify the delegate before removing dead values from a live interval.Jakob Stoklund Olesen
The register allocator needs to know when the range shrinks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Allow the allocation of empty live ranges that have uses.Jakob Stoklund Olesen
Empty ranges may represent undef values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128144 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Dump the register map before rewriting.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23A global variable with internal linkage where all uses are in one function ↵Anders Carlsson
and whose address is never taken is a non-escaping local object and can't alias anything else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Added block number and name to isel debug output.Andrew Trick
I'm tired of doing this manually for each checkout. If anyone knows a better way debug isel for non-trivial tests feel free to revert and let me know how to do it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22For ARM Disassembler, start a newline to dump the opcode and friends for an ↵Johnny Chen
instruction. Change inspired by llvm-bug 9530 submitted by Jyun-Yan You. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22RIT_ARM_ThumbBranch32Bit relocations are not used and should never be generated.Owen Anderson
This fixes kimwitu++, bullet, and tramp3dv4 with the ARM integrated assembler. Fixes <rdar://problem/9165738>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Reapply r128045 and r128051 with fixes.Jakob Stoklund Olesen
This will extend the ranges of debug info variables in registers until they are clobbered. Fix 1: Don't mistake DBG_VALUE instructions referring to incoming arguments on the stack with DBG_VALUE instructions referring to variables in the frame pointer. This fixes the gdb test-suite failure. Fix 2: Don't trace through copies to physical registers setting up call arguments. These registers are call clobbered, and the source register is more likely to be a callee-saved register that can be extended through the call instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22LDRT and LDRBT was incorrectly tagged as IndexModeNone during the ↵Johnny Chen
refactorings (r119821). We now tag them as IndexModePost. This fixed http://llvm.org/bugs/show_bug.cgi?id=9530. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22A bit more analysis of a memset-related README entry.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22A8.6.399 VSTM:Johnny Chen
VFP Load/Store Multiple Instructions used to embed the IA/DB addressing mode within the MC instruction; that has been changed so that now, for example, VSTMDDB_UPD and VSTMDIA_UPD are two instructions. Update the ARMDisassemblerCore.cpp's DisassembleVFPLdStMulFrm() to reflect the change. Also add a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Migrate the fix in r128041 to ARM's fastisel support as well.Eric Christopher
Fixes rdar://9169640 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22We don't need a null terminator for the output file.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Revert r128045 and r128051, debug info enhancements.Andrew Trick
Temporarily reverting these to see if we can get llvm-objdump to link. Hopefully this is not the problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Tidy up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Add missing file from previous commit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Propogate the error message, not just the error state.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128094 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Add simple arg passing to MC-JIT and support for exit() call.Jim Grosbach
Support argument passing simple, common, prototypes directly. More complicated scenarios will require building up a stub function, which the MC-JIT isn't set up to handle yet. Add Intercept.cpp, which is just a copy from ExecutionEngine/JIT for now, to handle looking looking up external symbol names. This probably more properly belongs as part of RuntimeDyld. It'll migrate there as things flesh out more fully. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Trailing whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Change MRC and MRC2 instructions to model the output register properlyBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128085 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-06 00:50:52 +0000