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2010-11-08Add physical register counting functionsChe-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118397 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-08Add a dummy PTXMCAsmStreamer classChe-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-08Set default flags for .rodata.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118395 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-08Add registry hook for assembly text outputChe-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-08Make RegList an ASM operand so that TableGen will generate code for it. This isBill Wendling
an initial implementation and may change once reglists are fully fleshed out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118390 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-08Revert.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-07Add simplification of floating point comparisons with the resultDuncan Sands
of a select instruction, the same as already exists for integer comparisons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-07Fix a README item: when doing a comparison with the resultDuncan Sands
of a select instruction, see if doing the compare with the true and false values of the select gives the same result. If so, that can be used as the value of the comparison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-07Speed up AddSectionToTheEnd. It was walking all fragments in all sections.Rafael Espindola
This is really slow with we have 1000s of sections each with a corresponding relocation section. Also, it is only used by the ELF writer to add basic data, so there is no need to force a new layout pass. Should fix PR8563. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-07In this context, a reglist is a reg.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-07Fix memory leak in StringRef::edit_distance(). 'Allocated' could be leaked ↵Ted Kremenek
on an early return. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-07Add method for checking if a path is a symbolic link.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118367 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-07Relax dwarf line fragments. This fixes a crash in the included testcase.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06implement aliases for div/idiv that have an explicit A register operand,Chris Lattner
implementing rdar://8431864 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Add support for parsing register lists. We can't use a bitfield to keep track ofBill Wendling
the registers, because the register numbers may be much greater than the number of bits available in the machine's register. I extracted the register list verification code out of the actual parsing of the registers. This made checking for errors much easier. It also limits the number of warnings that would be emitted for cascading infractions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118363 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06add aliases for movs between seg registers and mem. There are multipleChris Lattner
different forms of this instruction (movw/movl/movq) which we reported as being ambiguous. Since they all do the same thing, gas just picks the one with the shortest encoding. Follow its lead here. This implements rdar://8208615 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118362 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118361 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Return the base register of a register list for the "getReg()" method. This isBill Wendling
to satisfy the ClassifyOperand method of the Asm matcher without having to add a RegList type to every back-end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06work-in-progressChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06General cleanup:Bill Wendling
- Make ARMOperand a class so that some things are internal to the class. - Reformatting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118357 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06go to great lengths to work around a GAS bug my previous patchChris Lattner
exposed: GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)" even though st(0) is implicit in all other fp stack instructions. Fortunately, there is an alias for fcomip named "fcompi" and gas does accept the default argument for the alias (boggle!). As such, switch the canonical form of this instruction to "pi" instead of "ip". This makes the code generator and disassembler generate pi, avoiding the gas bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06rework the rotate-by-1 instructions to be defined like theChris Lattner
shift-by-1 instructions, where the asmstring doesn't contain the implicit 1. It turns out that a bunch of these rotate instructions were completely broken because they used 1 instead of $1. This fixes assembly mismatches on "rclb $1, %bl" and friends, where we used to generate the 3 byte form, we now generate the proper 2-byte form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118355 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06change the fp comparison instructions to not have %st0 explicitlyChris Lattner
listed in its asm string, for consistency with the other similar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06move the plethora of fp stack aliases to the .td file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06add (and document) the ability for alias results to haveChris Lattner
fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Add a RegList (register list) object to ARMOperand. It will be used soon to holdBill Wendling
(surprise!) a list of registers. Register lists are consecutive, so we only need to record the start register plus the number of registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118351 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06generalize alias support to allow the result of an alias toChris Lattner
add fixed immediate values. Move the aad and aam aliases to use this, and document it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06move fnstsw aliases to .td file, fix typoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06move in/out aliases to the .td files.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06move sldt, imul, and movabsq aliases from c++ to .td file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06correct suffix matching to search for s/l/t suffixes on Chris Lattner
floating point stack instructions instead of looking for b/w/l/q. This fixes issues where we'd accidentally match fistp to fistpl, when it is in fact an ambiguous instruction. This changes the behavior of llvm-mc to reject fstp, which was the correct fix for rdar://8456389: t.s:1:1: error: ambiguous instructions require an explicit suffix (could be 'fstps', 'fstpl', or 'fstpt') fstp (%rax) it also causes us to correctly reject fistp and fist, which addresses PR8528: t.s:2:1: error: ambiguous instructions require an explicit suffix (could be 'fistps', or 'fistpl') fistp (%rax) ^ t.s:3:1: error: ambiguous instructions require an explicit suffix (could be 'fists', or 'fistl') fist (%rax) ^ Thanks to Ismail Donmez for tracking down the issue here! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Prune includes.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Fix grammar.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118341 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Fix grammar.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118340 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06MatchRegisterName() returns 0 if it can't match the register.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Use TryParseRegister() instead of MatchRegisterName(). The former returns -1Bill Wendling
while the latter doesn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Add a note.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06fix a bug where we had an implicit assumption that theChris Lattner
result instruction operand numbering matched the result pattern. Fixing this allows us to move the xchg/test aliases to the .td file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Make sure we have movw on the target before using it.Eric Christopher
Fixes 8559. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06move the lcall/ljmp aliases to the .td file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118332 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06move the "movsd -> movsl" alias to the .td files, Chris Lattner
tidy up the movsx and movzx aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118331 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06fix some bugs in the alias support, unblocking changing of "clr" aliasesChris Lattner
from c++ hacks to proper .td InstAlias definitions. Change them! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118330 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Reimplement BuildResultOperands to be in terms of the result instruction'sChris Lattner
operand list instead of the operand list redundantly declared on the alias or instruction. With this change, we finally remove the ins/outs list on the alias. Before: def : InstAlias<(outs GR16:$dst), (ins GR8 :$src), "movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; After: def : InstAlias<"movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; This also makes the alias mechanism more general and powerful, which will be exploited in subsequent patches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Hook up the '.code {16|32}' directive to the streamer.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Add '.code 32' assembler directive to MC streamers.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Hook up the '.thumb_func' directive to the streamer.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Fix past-o.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05MC'ize the '.code 16' and '.thumb_func' ARM directives.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118301 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Disallow the certain NEON modified-immediate forms when generating vorr or vbic.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05MC'ize simple ARMConstantValue entry emission (with a FIXME).Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118295 91177308-0d34-0410-b5e6-96231b3b80d8
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