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2011-06-25Make Binary the parent of ObjectFile and update children to new interface.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133870 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25Add Binary class. This is a cleaner parent than ObjectFile.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25Add Object/Error.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25Enable tail call optimization in the presence of a byval (x86-32 and x86-64).Chad Rosier
<rdar://problem/9483883> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25Unbreak CMake buildDouglas Gregor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Add include guard.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Rename TargetDesc to MCTargetDescEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133846 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Refactor MachO relocation generaration into the Target directories.Jim Grosbach
Move the target-specific RecordRelocation logic out of the generic MC MachObjectWriter and into the target-specific object writers. This allows nuking quite a bit of target knowledge from the supposedly target-independent bits in lib/MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24The scheduler needs to be aware on the existence of untyped nodes when it ↵Owen Anderson
performs type propagation for EXTRACT_SUBREG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133838 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Fix cmake build.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Fix struct member's scope. Patch by Xi Wang.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133828 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Hoist simple check above more complex checking to avoid unnecessary Chad Rosier
overheads. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133824 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Revert unintentional check-in.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133822 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Handle debug info for i128 constants.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24- Add MCRegisterInfo registration machinery. Also added x86 registration ↵Evan Cheng
routines. - Rename TargetRegisterDesc to MCRegisterDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133820 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24ARM movw/movt fixups need to mask the high bits.Jim Grosbach
The fixup value comes in as the whole 32-bit value, so for the lo16 fixup, the upper bits need to be masked off. Previously we assumed the masking had already been done and asserted. rdar://9635991 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24tidy up whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133815 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24PTX: Add support for i8 type and introduce associated .b8 registersDan Bailey
The i8 type is required for boolean values, but can only use ld, st and mov instructions. The i1 type continues to be used for predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133814 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24The Neon VCVT (between floating-point and fixed-point, Advanced SIMD) Chad Rosier
instructions can be used to match combinations of multiply/divide and VCVT (between floating-point and integer, Advanced SIMD). Basically the VCVT immediate operand that specifies the number of fraction bits corresponds to a floating-point multiply or divide by the corresponding power of 2. For example, VCVT (floating-point to fixed-point, Advanced SIMD) can replace a combination of VMUL and VCVT (floating-point to integer) as follows: Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>): vmul.f32 d16, d17, d16 vcvt.s32.f32 d16, d16 becomes: vcvt.s32.f32 d16, d16, #3 Similarly, VCVT (fixed-point to floating-point, Advanced SIMD) can replace a combinations of VCVT (integer to floating-point) and VDIV as follows: Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>): vcvt.f32.s32 d16, d16 vdiv.f32 d16, d17, d16 becomes: vcvt.f32.s32 d16, d16, #3 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133813 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24PTX: Add preliminary support for outputting debug information in the form ofJustin Holewinski
.file and .loc directives. Ideally, we would utilize the existing support in AsmPrinter for this, but I cannot find a way to get .file and .loc directives to print without the rest of the associated DWARF sections, which ptxas cannot handle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Change the chain input of nodes that load the address of a function. This changeAkira Hatanaka
enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a pre-existing node instead of redundantly create a new node every time it is called. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Fixup info for Thumb2 unconditional branch.Jim Grosbach
rdar://9667872 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133808 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Prevent generation of redundant addiu instructions that compute address of Akira Hatanaka
static variables or functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133803 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24PTX: Re-work target sm/compute selection and add some basic GPUJustin Holewinski
targets: g80, gt200, gf100(fermi) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133799 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24SimplifyRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133798 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Now that bb with phis are not considered simple, duplicate them even ifRafael Espindola
we cannot duplicate to every predecessor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133797 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Simplify now that blocks with phis are not considered simple.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133793 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Fix CellSPU CMakeList.txt.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133792 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Fix CellSPU CMakeLists.txtEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng
target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Calculate backedge probability correctly.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Tidy up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133770 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Missing files for the BlockFrequency analysis added.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Introduce BlockFrequency analysis for BasicBlocks.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Add support for movntil/movntiq mnemonics. Reported on llvmdev.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23PR10180: Fix a instcombine crash with FP vectors.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133756 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Rename TargetOptions::StackAlignment to StackAlignmentOverride.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Remove TargetOptions.h dependency from ARMSubtarget.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133738 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23PTX: Always use registers for return values, but use .param space for deviceJustin Holewinski
parameters if SM >= 2.0 - Update test cases to be more robust against register allocation changes - Bump up the number of registers to 128 per type - Include Python script to re-generate register file with any number of registers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133736 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23PTX: Whitespace fixes and remove commented out codeJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133734 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23PTX: Prevent DCE from eliminating st.param calls, and unify the handling ofJustin Holewinski
st.param and ld.param FIXME: Test cases still need to be updated git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133733 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23PTX: Use .param space for parameters in device functions for SM >= 2.0Justin Holewinski
FIXME: DCE is eliminating the final st.param.x calls, figure out why git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133732 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Remove TargetOptions.h dependency from X86Subtarget.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Revert "revert 133714"Rafael Espindola
This reverts commit e8e00f5efb4a22238f2407bf813de4606f30c5aa. The cmake build on OS X is still broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133718 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23revert 133714Dylan Noblesmith
It broke the build worse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23133713 broke the build, revert it.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Support: make floating-exception header privateDylan Noblesmith
It has only one user. This eliminates the last include of config.h from the public headers -- ideally, config.h shouldn't even be installed by `make install` anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133713 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23CppBackend: fixup for api changeDylan Noblesmith
This broke after r133364. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Reinstate r133513 (reverted in r133700) with an additional fix for aJay Foad
-Wshorten-64-to-32 warning in Instructions.h. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Use a reference. Don't make a useless copy of the vector.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133707 91177308-0d34-0410-b5e6-96231b3b80d8
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