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2012-10-04Use method to query for attributes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Add method to query for 'NoAlias' attribute on call/invoke instructions.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165208 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Use method to query for attributes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165207 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Query for attributes via the correct method call.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165206 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Use new accessor methods to query for attributes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04[tsan] add 3 internal flags for fine-grain control of what is instrumented ↵Kostya Serebryany
and what is not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165204 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Remove template from function that is only used with one type after r165092.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Fix reg mask slot test, and preserve LiveIntervals and VirtRegMap in the PBQPLang Hames
allocator. Fixes PR13945. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165201 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Implement methods that enable expansion of load immediate Jack Carter
macro instruction (li) in the assembler. We have identified three possible expansions depending on the size of immediate operand: 1) for 0 ≤ j ≤ 65535. li d,j => ori d,$zero,j 2) for −32768 ≤ j < 0. li d,j => addiu d,$zero,j 3) for any other value of j that is representable as a 32-bit integer. li d,j => lui d,hi16(j) ori d,d,lo16(j) All of the above have been implemented in ths patch. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04This patch is a partial implementation of mips .set assembler directive. ↵Jack Carter
Directive is defined as follows: .set option The patch implements following options at - lets the assembler use the $at register for macros, but generates warnings if the source program uses $at noat - let source programs use $at without issuingwarnings. noreorder - prevents the assembler from reordering machine language instructions. nomacro - causes the assembler to print a warning whenever an assembler operation generates more than one machine language instruction. macro - lets the assembler generate multiple machine instructions from a single assembler instruction reorder - lets the assembler reorder machine language instructions to improve performance The above variants are parsed and their boolean values set or unset. The code to actually use them will come later. Following options are not implemented yet: nomips16 nomicromips move nomove Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04tblgen: Whitespace and 80-col cleanup.Sean Silva
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Enable -schedmodel, but prefer itineraries until we have more benchmark data.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Fix PR13967.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Clean up tailing whitespacesMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165182 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03[ms-inline asm] Add support in the X86AsmPrinter for printing memory referencesChad Rosier
in the Intel syntax. The MC layer supports emitting in the Intel syntax, but this would require the inline assembly MachineInstr to be lowered to an MCInst before emission. This is potential future work, but for now emitting directly from the MachineInstr suffices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03This patch moves from using a hard coded number (4) Jack Carter
for the number of bytes in a particular instruction to using const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); Desc.getSize() This is necessary with the advent of 16 bit instructions with mips16 and micromips. It is also puts Mips in compliance with the other targets for getting instruction size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03tblgen: Remove last traces of old TableGenMain API.Sean Silva
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165168 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03tblgen: Put new TableGenMain API in place.Sean Silva
In order to avoid rev-lock with Clang when moving to the new API, also preserve the current API temporarily and insert a shim to implement the new API in terms of the old. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Update to use the predicate methods to query if an attribute exists.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165163 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Fix a cycle in the DAG. In this code we replace multiple loads with a single ↵Nadav Rotem
load and multiple stores with a single load. We create the wide loads and stores (and their chains) before we remove the scalar loads and stores and fix the DAG chain. We attempted to merge loads with a different chain. When that happened, the assumption that it is safe to RAUW broke and a cycle was introduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Typos.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165141 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Add methods which query for the specific attribute instead of using theBill Wendling
enums. This allows for better encapsulation of the Attributes class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Implement .rel relocation for R_ARM_ABS32 in MCJIT.Tim Northover
Patch by Amara Emerson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03This Patch corrects a problem whereby the optimization to use a faster dividePreston Gurd
instruction (for Intel Atom) was not being done by Clang, because the type context used by Clang is not the default context. It fixes the problem by getting the global context types for each div/rem instruction in order to compare them against the types in the BypassTypeMap. Tests for this will be done as a separate patch to Clang. Patch by Tyler Nowicki. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165126 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03A DAGCombine optimization for mergeing consecutive stores to memory. The ↵Nadav Rotem
optimization is not profitable in many cases because modern processors perform multiple stores in parallel and merging stores prior to merging requires extra work. We handle two main cases: 1. Store of multiple consecutive constants: q->a = 3; q->4 = 5; In this case we store a single legal wide integer. 2. Store of multiple consecutive loads: int a = p->a; int b = p->b; q->a = a; q->b = b; In this case we load/store either ilegal vector registers or legal wide integer registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Set up MCSchedModel after detecting the CPU type in X86SubTarget.Preston Gurd
Corrects a problem whereby MCSchedModel was not being set up when the CPU type was auto-detected. Patch by Andy Zhang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03tsan: prepare for migration to new memory_order enum values (ABI compatible)Dmitry Vyukov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Fixed a bug in the ExecutionDependencyFix pass that caused dependencies to ↵Silviu Baranga
not propagate through implicit defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Fix an issue where we failed to adjust the alignment constraint onChandler Carruth
a memcpy to reflect that '0' has a different meaning when applied to a load or store. Now we correctly use underaligned loads and stores for the test case added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Try to use a better set of abstractions for computing the alignmentChandler Carruth
necessary during rewriting. As part of this, fix a real think-o here where we might have left off an alignment specification when the address is in fact underaligned. I haven't come up with any way to trigger this, as there is always some other factor that reduces the alignment, but it certainly might have been an observable bug in some way I can't think of. This also slightly changes the strategy for placing explicit alignments on loads and stores to only do so when the alignment does not match that required by the ABI. This causes a few redundant alignments to go away from test cases. I've also added a couple of tests that really push on the alignment that we end up with on loads and stores. More to come here as I try to fix an underlying bug I have conjectured and produced test cases for, although it's not clear if this bug is the one currently hitting dragonegg's gcc47 bootstrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165100 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Revert 165051-165049 while looking into the foreach.m failure inEric Christopher
more detail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Fix doxygen comment to match function name.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Remove unused function that used to get itineraries from SubTargetFeatures. ↵Craig Topper
This is done from MCSubTargetInfo these days. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Fix 80-column violationCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03The early if conversion pass is ready to be used as an opt-in.Jakob Stoklund Olesen
Enable the pass by default for targets that request it, and change the -enable-early-ifcvt to the opposite -disable-early-ifcvt. There are still some x86 regressions when enabling early if-conversion because of the missing machine models. Disable the pass for x86 until machine models are added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Switch the SetVector::remove_if implementation to use partition whichChandler Carruth
preserves the values of the relocated entries, unlikely remove_if. This allows walking them and erasing them. Also flesh out the predicate we are using for this to support the various constraints actually imposed on a UnaryPredicate -- without this we can't compose it with std::not1. Thanks to Sean Silva for the review here and noticing the issue with std::remove_if. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Fix a serious X86 instruction selection bug. InEvan Cheng
X86DAGToDAGISel::PreprocessISelDAG(), isel is moving load inside callseq_start / callseq_end so it can be folded into a call. This can create a cycle in the DAG when the call is glued to a copytoreg. We have been lucky this hasn't caused too many issues because the pre-ra scheduler has special handling of call sequences. However, it has caused a crash in a specific tailcall case. rdar://12393897 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Revert "Don't use a debug location for frame setup instructions in the"Eric Christopher
This reverts 165055 and 165052 temporarily while I look at debugger failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Revert 165057, per Jim's request. This requires further discussion.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed ↵Jack Carter
by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands. If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler. This code was originally called from MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically. The test cases have been checked in for a number of weeks now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Teach the new SROA to handle cases where an alloca that has already beenChandler Carruth
scheduled for processing on the worklist eventually gets deleted while we are processing another alloca, fixing the original test case in PR13990. To facilitate this, add a remove_if helper to the SetVector abstraction. It's not easy to use the standard abstractions for this because of the specifics of SetVectors types and implementation. Finally, a nice small test case is included. Thanks to Benjamin for the fantastic reduced test case here! All I had to do was delete some empty basic blocks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165065 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Make sure to put our sret argument into %rax on x86-64. Fixes PR13563!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Remove the old coalescer algorithm.Jakob Stoklund Olesen
The new algorithm has been enabled by default for almost a week now and seems to be stable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Handle reserved registers more accurately in handleMove().Jakob Stoklund Olesen
Reserved register live ranges look like a set of dead defs - any uses of reserved registers are ignored. Instead of skipping the updating of reserved register operands entirely, just ignore the use operands and treat the def operands normally. No test case, handleMove() is not commonly used yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02[ms-inline asm] Add basic support for wildcard MCParsedAsmOperands. This typeChad Rosier
of operand is specific to MS-style inline assembly and should not be generated when parsing normal assembly. The purpose of the wildcard operands are to allow the AsmParser to match multiple instructions (i.e., MCInsts) to a given ms-style asm statement. For the time being the matcher just returns the first match. This patch only implements wildcard matches for memory operands. Support for register wildcards will be added in the near future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Make sure the whole live range is covered when values are pruned twice.Jakob Stoklund Olesen
JoinVals::pruneValues() calls LIS->pruneValue() to avoid conflicts when overlapping two different values. This produces a set of live range end points that are used to reconstruct the live range (with SSA update) after joining the two registers. When a value is pruned twice, the set of end points was insufficient: v1 = DEF v1 = REPLACE1 v1 = REPLACE2 KILL v1 The end point at KILL would only reconstruct the live range from REPLACE2 to KILL, leaving the range REPLACE1-REPLACE2 dead. Add REPLACE2 as an end point in this case so the full live range is reconstructed. This fixes PR13999. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165056 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-0280-col.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165054 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Clean-up of memory buffer and object ownership model in MCJITAndrew Kaylor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165053 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Don't use a debug location for frame setup instructions in theEric Christopher
prologue. Also skip frame setup instructions when looking for the first location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165052 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Use the existing DebugLoc.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165051 91177308-0d34-0410-b5e6-96231b3b80d8
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