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2012-08-16Teach GVN to reason about edges dominating uses. This allows it to handle casesRafael Espindola
where some fact lake a=b dominates a use in a phi, but doesn't dominate the basic block itself. This feature could also be implemented by splitting critical edges, but at least with the current algorithm reasoning about the dominance directly is faster. The time for running "opt -O2" in the testcase in pr10584 is 1.003 times slower and on gcc as a single file it is 1.0007 times faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16[arm-fast-isel] Add support for fastcc.Jush Lu
Without fastcc support, the caller just falls through to CallingConv::C for fastcc, but callee still uses fastcc, this inconsistency of calling convention is a problem, and fastcc support can fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.Anitha Boyapati
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162012 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 ↵Anitha Boyapati
91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16Add Android ABI to Mips backend to handle functions returning vectors of fourAkira Hatanaka
floats. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162008 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen
The ARM select instructions are just predicated moves. If the select is the only use of an operand, the instruction defining the operand can be predicated instead, saving one instruction and decreasing register pressure. This implementation can turn AND/ORR/EOR instructions into their corresponding ANDCC/ORRCC/EORCC variants. Ideally, we should be able to predicate any instruction, but we don't yet support predicated instructions in SSA form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161994 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Remove dead flag.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Fixed a problem in the JIT memory allocator whereSean Callanan
allocations of executable memory would not be padded to account for the size of the allocation header. This resulted in undersized allocations, meaning that when the allocation was written to later the next allocation's header would be corrupted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Properly test the LLVM_USE_RVALUE_REFERENCES macro.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15[PathV2] Add mapped_file_region. Implementation for Windows and POSIX.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Fix another roundToIntegral bug where very large values could become ↵Owen Anderson
infinity. Problem and solution identified by Steve Canon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161969 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows ↵Evan Cheng
unaligned access. rdar://12091029 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161962 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Fix typo in comment.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Add missing Rfalse operand to the predicated pseudo-instructions.Jakob Stoklund Olesen
When predicating this instruction: Rd = ADD Rn, Rm We need an extra operand to represent the value given to Rd when the predicate is false: Rd = ADDCC Rfalse, Rn, Rm, pred The Rd and Rfalse operands are different registers while in SSA form. Rfalse is tied to Rd to make sure they get the same register during register allocation. Previously, Rd and Rn were tied, but that is not required. Compare to MOVCC: Rd = MOVCC Rfalse, Rtrue, pred git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161955 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Set the branch probability of branching to the 'normal' destination of an invokeBill Wendling
instruction to something absurdly high, while setting the probability of branching to the 'unwind' destination to the bare minimum. This should set cause the normal destination's invoke blocks to be moved closer to the invoke. PR13612 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161944 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15[asan] implement --asan-always-slow-path, which is a part of the improvement ↵Kostya Serebryany
to handle unaligned partially OOB accesses. See http://code.google.com/p/address-sanitizer/issues/detail?id=100 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Fix a problem with APFloat::roundToIntegral where it would return incorrect ↵Owen Anderson
results for negative inputs to trunc. Add unit tests to verify this behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161929 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15fix infinite loop in instcombine with more than 4GB memcpyMichael Liao
- memcpy size is wrongly truncated into 32-bit and treat 8GB memcpy is 0-sized memcpy - as 0-sized memcpy/memset is already removed before SimplifyMemTransfer and SimplifyMemSet in visitCallInst, replace 0 checking with assertions. - replace getZExtValue() with getLimitedValue() according to Eli Friedman git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161923 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Fix a typo that led to a failure to correctly verify bitcast instructions.Nick Lewycky
Patch by Stephen Hines! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15Fix undefined behavior: don't perform array indexing through a potentially nullRichard Smith
pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161919 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14The names of VFP variants of half-to-float conversion instructions wereAnton Korobeynikov
reversed. This leads to wrong codegen for float-to-half conversion intrinsics which are used to support storage-only fp16 type. NEON variants of same instructions are fine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161907 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14This needs braces. Spotted by Bill.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161906 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14minor fix of X86ISD::VSEXT_MOVL dumpMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14fix PR11334Michael Liao
- FP_EXTEND only support extending from vectors with matching elements. This results in the scalarization of extending to v2f64 from v2f32, which will be legalized to v4f32 not matching with v2f64. - add X86-specific VFPEXT supproting extending from v4f32 to v2f64. - add BUILD_VECTOR lowering helper to recover back the original extending from v4f32 to v2f64. - test case is enhanced to include different vector width. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Switch the fixed-length disassembler to be table-driven.Jim Grosbach
Refactor the TableGen'erated fixed length disassemblmer to use a table-driven state machine rather than a massive set of nested switch() statements. As a result, the ARM Disassembler (ARMDisassembler.cpp) builds much more quickly and generates a smaller end result. For a Release+Asserts build on a 16GB 3.4GHz i7 iMac w/ SSD: Time to compile at -O2 (averaged w/ hot caches): Previous: 35.5s New: 8.9s TEXT size: Previous: 447,251 New: 297,661 Builds in 25% of the time previously required and generates code 66% of the size. Execution time of the disassembler is only slightly slower (7% disassembling 10 million ARM instructions, 19.6s vs 21.0s). The new implementation has not yet been tuned, however, so the performance should almost certainly be recoverable should it become a concern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161888 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Fix the construction of the magic constant for roundToIntegral to be 64-bit ↵Owen Anderson
safe. Fixes c-torture/execute/990826-0.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14[asan] insert crash basic blocks inline as opposed to inserting them at the ↵Kostya Serebryany
end of the function. This doesn't seem to fix or break anything, but is considered to be more friendly to downstream passes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161870 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Factor duplicate calls to getUNDEF in several functions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161860 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Re-factor intrinsic lowering to combine common parts of similar intrinsics. ↵Craig Topper
Reduces compiled code size a little bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161859 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Change greater than to greater than or equal so that an identical sized ↵Craig Topper
store to the same offset is treated as completing overwriting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161857 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Fix undefined behavior: binding null pointer to reference. No functionality ↵Richard Smith
change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161853 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14During the CodeGenPrepare we often lower intrinsics (such as objsize)Nadav Rotem
and allow some optimizations to turn conditional branches into unconditional. This commit adds a simple control-flow optimization which merges two consecutive basic blocks which are connected by a single edge. This allows the codegen to operate on larger basic blocks. rdar://11973998 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Grammar.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14Typo.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161826 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Add a roundToIntegral method to APFloat, which can be parameterized over ↵Owen Anderson
various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161807 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Transfer weights in transferSuccessorsAndUpdatePHIs().Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Print out MachineBasicBlock successor weights when available.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13LICM uses AliasSet information to hoist and sink instructions. However, ↵Nadav Rotem
other passes, such as LoopRotate may invalidate its AliasSet because SSAUpdater does not update the AliasSet properly. This patch teaches SSAUpdater to notify AliasSet that it made changes. The testcase in PR12901 is too big to be useful and I could not reduce it to a normal size. rdar://11872059 PR12901 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161803 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13MemoryDependenceAnalysis attempts to find the first memory dependency for ↵Nadav Rotem
function calls. Currently, if GetLocation reports that it did not find a valid pointer (this is the case for volatile load/stores), we ignore the result. This patch adds code to handle the cases where we did not obtain a valid pointer. rdar://11872864 PR12899 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Remove the TII::scheduleTwoAddrSource() hook.Jakob Stoklund Olesen
It never does anything when running 'make check', and it get's in the way of updating live intervals in 2-addr. The hook was originally added to help form IT blocks in Thumb2 code before register allocation, but the pass ordering has changed since then, and we run if-conversion after register allocation now. When the MI scheduler is enabled, there will be no less than two schedulers between 2-addr and Thumb2ITBlockPass, so this hook is unlikely to help anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161794 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13ARM: enable struct byval for AAPCS-VFP.Manman Ren
This change is to be enabled in clang. rdar://9877866 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161789 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Whitespace cleanup.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161788 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Count triangles and diamonds in early if-conversion.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Delete dead typedef.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Handle extra Tail predecessors in if-conversion.Jakob Stoklund Olesen
It is still possible to if-convert if the tail block has extra predecessors, but the tail phis must be rewritten instead of being removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161781 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13[Hexagon] Don't mark callee saved registers as clobbered by a tail callArnold Schwaighofer
This was causing unnecessary spills/restores of callee saved registers. Fixes PR13572. Patch by Pranav Bhandarkar! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ↵Nadav Rotem
ISDNode has more than one user. rdar://11876519 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161775 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr fromManman Ren
OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed to a memory operand. PR13576 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161769 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13Add support for the %H output modifier.Eric Christopher
Patch by Weiming Zhao. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13X86: when auto-detecting the subtarget features, make sure use IsIntel to detectManman Ren
Nehalem, Westmere and Sandy Bridge. AMD also has processor family 6. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161763 91177308-0d34-0410-b5e6-96231b3b80d8
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