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2011-05-18Use IRBuilder while simplifying unwind.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Enables vararg functions that pass all arguments via registers to be ↵Chad Rosier
optimized into tail-calls when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18More instcombine cleanup aimed towards improving debug line info.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Second pass at allowing plugins to modify default passes. This time without ↵David Chisnall
bonus inter-library dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Revise r131553. Just use the type of the input node and forgo the bitcast. ↵Evan Cheng
rdar://9449159. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131555 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same ↵Evan Cheng
type as input. Sorry test cases only trigger when dag combine is disabled. rdar://9449178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Use IRBuilder while simplifying terminator.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Use IRBuilder while simplifying unconditional branch.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Use IRBuilder while folding two entry PHINode.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Switch more inst insertion in instcombine to IRBuilder.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Set up IRBuilder for use during simplification.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Switch more inst insertion in instcombine to IRBuilder.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131544 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18fix typoMatt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131543 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Switch inst insertion in instcombine transform to IRBuilder.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Use IRBuiler while constant folding terminator.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131541 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Fix inelegant initialization.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18PTX: add flag to disable mad/fma selectionJustin Holewinski
Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Revert commit 131534 since it seems to have broken several buildbots.Duncan Sands
Original log entry: Refactor getActionType and getTypeToTransformTo ; place all of the 'decision' code in one place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'Nadav Rotem
code in one place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Now that SrcBits and DestBits always represent the primitive size, ratherDuncan Sands
than either the primitive size or the element primitive size (in the case of vectors), simplify the vector logic. No functionality change. There is some distracting churn in the patch because I lined up comments better while there - sorry about that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Tighten up checking of the validity of casts. (1) The IR parser wouldDuncan Sands
happily accept things like "sext <2 x i32> to <999 x i64>". It would also accept "sext <2 x i32> to i64", though the verifier would catch that later. Fixed by having castIsValid check that vector lengths match except when doing a bitcast. (2) When creating a cast instruction, check that the cast is valid (this was already done when creating constexpr casts). While there, replace getScalarSizeInBits (used to allow more vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable since vector to vector casts are now handled explicitly by passing to the element types; i.e. this bit should result in no functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Teach getCastOpcode about element-by-element vector casts. For example, "trunc"Duncan Sands
can be used to turn a <4 x i64> into a <4 x i32> but getCastOpcode would assert if you passed these types to it. Note that this strictly extends the previous functionality: if getCastOpcode previously accepted two vector types (i.e. didn't assert) then it still will and returns the same opcode (BitCast). That's because before it would only accept vectors with the same bitwidth, and the new code only touches vectors with the same length. However if two vectors have both the same bitwidth and the same length then their element types have the same bitwidth, so the new logic will return BitCast as before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18In r131488 I misunderstood how VREV works. It splits the vector in half and ↵Tanya Lattner
splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32. Updated test case and reverted change to the PerfectShuffle Table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Implement the Win64 EH directive methods for the assembly language streamer.Charles Davis
GAS has no such directives (not even mingw-w64 GAS has them), so I took creative license with their names in assembly. I prefixed them all with "w64_" to avoid namespace collisions, for example. If I discover that GAS has taken a different approach, I'll change ours to match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Eliminate dead dead code elimination code.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131524 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Also use shrinkToUses after AdjustCopiesBackFrom().Jakob Stoklund Olesen
The 'last use' may not be in the same basic block, and we still want a correct live range. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18While thinking about how to know where the functions' boundaries are forCharles Davis
the purposes of the Win64 EH tables, I realized we had no way to tell where the function ends. (MASM bounds functions with PROC and ENDP keywords.) Add a directive to delimit the end of the function, and rename the 'frame' directive to more accurately reflect its duality with the new directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Properly shrink live ranges after deleting dead copies. Clean up after all ↵Jakob Stoklund Olesen
joined copies. LiveInterval::shrinkToUses recomputes the live range from scratch instead of removing snippets. This should avoid the problem with dangling live ranges. Leave physreg identity copies alone. They can be created when joining a virtreg with a physreg. They don't affect register allocation, and they will be removed by the rewriter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Fix typo.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131519 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Fix more of PR8825 by correctly using rGPR registers when lowering atomicCameron Zwarich
compare-and-swap intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Start trying to make InstCombine preserve more debug info. The idea here is ↵Eli Friedman
to set the debug location on the IRBuilder, which will be then right location in most cases. This should magically give many transformations debug locations, and fixing places which are missing a debug location will usually just means changing the code creating it to use the IRBuilder. As an example, the change to InstCombineCalls catches a common case where a call to a bitcast of a function is rewritten. Chris, does this approach look reasonable? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18Use ReplaceInstUsesWith instead of replaceAllUsesWith where appropriate in ↵Eli Friedman
instcombine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131512 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Preseve line numbers while simplifying CFG.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Actually, the address operand of the Thumb2 LDREX / STREX instructions *can*Cameron Zwarich
take r13, so we can just make it a GPR. This fixes PR8825. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131507 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Correct a minor problem with the Thumb2 LDREX and STREX instruction ↵Cameron Zwarich
encodings. They were marked as taking a tGPR when in reality they take an rGPR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131506 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Conditionalize the format of the GCOV files by target type. Darwin uses the 4.2Bill Wendling
format. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Make fast-isel miss counting in -stats and -fast-isel-verbose take ↵Eli Friedman
terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Misc. code cleanups.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Misc. code cleanups.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17X86 pmovsx/pmovzx ignore the upper half of their inputs.Stuart Hastings
rdar://problem/6945110 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17vrev is incorrectly defined in the perfect shuffle table. The ordering is ↵Tanya Lattner
backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Preserve line number information.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Set debug loc for new load instruction.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Preserve line number information.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131480 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Enable autodetect of popcntMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.Eli Friedman
This is r131438 with a couple small fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Clean up the mess created by r131467+r131469.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Revert 131467 due to buildbot complaint.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Fix an obscure issue in X86_64 parameter passing: if a tiny byval isStuart Hastings
passed as the fifth parameter, insure it's passed correctly (in R9). rdar://problem/6920088 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131467 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17Tweak cross-class coalescing to be more aggressive when the target class is ↵Jakob Stoklund Olesen
small. The greedy register allocator has live range splitting and register class inflation, so it can actually fully undo this join, including restoring the original register classes. We still don't want to do this for long live ranges, mostly because of the high register pressure of there are many constrained live ranges overlapping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131466 91177308-0d34-0410-b5e6-96231b3b80d8
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