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2011-01-20Change instruction names for consistencyBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123930 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Add cdp/cdp2 instructions for thumb/thumb2Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123929 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20- Use a more appropriate name for Owen's ARM Parser isMCR hack since the ↵Bruno Cardoso Lopes
same operands can be present in cdp/cdp2 instructions. Also increase the hack with cdp/cdp2 instructions. - Fix the encoding of cdp/cdp2 instructions for ARM (no thumb and thumb2 yet) and add testcases for t hem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20SplitKit requires that all defs are in place before calling useIntv().Jakob Stoklund Olesen
The value mapping gets confused about which original values have multiple new definitions so they may need phi insertions. This could probably be simplified by letting enterIntvBefore() take a live range to be added following the instruction. As long as the range stays inside the same basic block, value mapping shouldn't be a problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123926 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Add LiveIntervalMap::dumpCache() to print out the cache used by the ssa ↵Jakob Stoklund Olesen
update algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123925 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Add mcr*2 and mr*c2 support to thumb2 targetsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Add mcr* and mr*c support to thumb targetsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123917 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Allow sign-extending of i8 and i16 to i128 on SPU. Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20At -O123 the early-cse pass is run before instcombine has run. According to myDuncan Sands
auto-simplier the transform most missed by early-cse is (zext X) != 0 -> X != 0. This patch adds this transform and some related logic to InstructionSimplify and removes some of the logic from instcombine (unfortunately not all because there are several situations in which instcombine can improve things by making new instructions, whereas instsimplify is not allowed to do this). At -O2 this often results in more than 15% more simplifications by early-cse, and results in hundreds of lines of bitcode being eliminated from the testsuite. I did see some small negative effects in the testsuite, for example a few additional instructions in three programs. One program, 483.xalancbmk, got an additional 35 instructions, which seems to be due to a function getting an additional instruction and then being inlined all over the place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123911 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Refactor mcr* and mr*c instructions into classes with the same encoding. No ↵Bruno Cardoso Lopes
functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123910 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20My editor's indent went crazy. Fix.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Expand invalid return values for umulo and smulo. Handle these similarlyEric Christopher
to add/sub by doing the normal operation and then checking for overflow afterwards. This generally relies on the DAG handling the later invalid operations as well. Fixes the 64-bit part of rdar://8622122 and rdar://8774702. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123908 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Correct itinerary entry for t2MOV_pic_ga_add_pc.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123907 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Sorry, several patches in one.Evan Cheng
TargetInstrInfo: Change produceSameValue() to take MachineRegisterInfo as an optional argument. When in SSA form, targets can use it to make more aggressive equality analysis. Machine LICM: 1. Eliminate isLoadFromConstantMemory, use MI.isInvariantLoad instead. 2. Fix a bug which prevent CSE of instructions which are not re-materializable. 3. Use improved form of produceSameValue. ARM: 1. Teach ARM produceSameValue to look pass some PIC labels. 2. Look for operands from different loads of different constant pool entries which have same values. 3. Re-implement PIC GA materialization using movw + movt. Combine the pair with a "add pc" or "ldr [pc]" to form pseudo instructions. This makes it possible to re-materialize the instruction, allow machine LICM to hoist the set of instructions out of the loop and make it possible to CSE them. It's a bit hacky, but it significantly improve code quality. 4. Some minor bug fixes as well. With the fixes, using movw + movt to materialize GAs significantly outperform the load from constantpool method. 186.crafty and 255.vortex improved > 20%, 254.gap and 176.gcc ~10%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123905 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Object: Add ELF support.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Object: Add COFF Support.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Selection DAG scheduler register pressure heuristic fixes.Andrew Trick
Added a check for already live regs before claiming HighRegPressure. Fixed a few cases of checking the wrong number of successors. Added some tracing until these heuristics are better understood. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Check that a live range exists before shortening it. This fixes PR8989.Jakob Stoklund Olesen
The live range may have been deleted earlier because of rematerialization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Add hidden -verify-coalescing to run the machine code verifier before and afterJakob Stoklund Olesen
register coalescing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123890 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Sparc backend: Implements a delay slot filler that attempt to fill delay slotsVenkatraman Govindaraju
with useful instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Update a comment.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123879 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Fix bug found by new clang warning.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Use only one API at a time.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20If we can, lower the multiply part of a umulo/smulo call to a libcallEric Christopher
with an invalid type then split the result and perform the overflow check normally. Fixes the 32-bit parts of rdar://8622122 and rdar://8774702. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Fix debug info for merged global.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Divert Hopfield network debug output. It is very noisy.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Don't accidentally leave small gaps in the live ranges when leaving the activeJakob Stoklund Olesen
interval after an instruction. The leaveIntvAfter() method only adds liveness from the instruction's boundary index to the inserted copy. Ideally, SplitKit should be smarter about this, perhaps by combining useIntv() and leaveIntvAfter() into one method that guarantees continuity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Make sure to propogate the error code when we fail to parse a modifier.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123857 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Fix register address expression. Patch by Ken Dyck.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Implement RAGreedy::splitAroundRegion and remove loop splitting.Jakob Stoklund Olesen
Region splitting includes loop splitting as a subset, and it is more generic. The splitting heuristics for variables that are live in more than one block are now: 1. Try to create a region that covers multiple basic blocks. 2. Try to create a new live range for each block with multiple uses. 3. Spill. Steps 2 and 3 are similar to what the standard spiller is doing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Similarly, analyze truncate through multiply.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123842 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Add a missed SCEV fold that is required to continue analyzing the IR producedNick Lewycky
by indvars through the scev expander. trunc(add x, y) --> add(trunc x, y). Currently SCEV largely folds the other way which is probably wrong, but preserved to minimize churn. Instcombine doesn't do this fold either, demonstrating a missed optz'n opportunity on code doing add+trunc+add. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123838 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Fix the encoding of mrrc and mcrr family of instructions. Also add testcases ↵Bruno Cardoso Lopes
for mcr and mrc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Add unnamed_addr when we can show that address of a global is not used.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Add a missing SCEV simplification sext(zext x) --> zext x.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19ARM/ISel: Factor out isScaledConstantInRange() helper.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123823 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19For ARM subtargets with useNEONForSinglePrecisionFP, double count usesAndrew Trick
of the floating point types less than 64-bits. It's somewhat of a temporary hack but forces more accurate modeling of register pressure and results in fewer spills. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19Don't forget to emit the load from indirect symbol when using movw + movt to ↵Evan Cheng
materialize GA indirect symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Create two new generic classes to represent the following VMRS/VMSR variations:Bruno Cardoso Lopes
vmrs reg, fpexc vmrs reg, fpsid vmsr fpexc, reg vmsr fpsid, reg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Fix MRS encoding for arm and thumb.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Fix the encoding of t2ISB by using the right class and also parse it correctlyBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Teach BasicAA to return PartialAlias in cases where both pointersDan Gohman
are pointing to the same object, one pointer is accessing the entire object, and the other is access has a non-zero size. This prevents TBAA from kicking in and saying NoAlias in such cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123775 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Add RAGreedy methods for splitting live ranges around regions.Jakob Stoklund Olesen
Analyze the live range's behavior entering and leaving basic blocks. Compute an interference pattern for each allocation candidate, and use SpillPlacement to find an optimal region where that register can be live. This code is still not enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123774 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Follow the current hack set and enable the correct parsing of bkpt while in ↵Bruno Cardoso Lopes
thumb mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123772 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18fix rdar://8878965, a regression I introduced with the recentChris Lattner
llvm.objectsize changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Add support for parsing and encoding ARM's official syntax for the BFI ↵Bruno Cardoso Lopes
instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123770 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Add a FIXME.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123769 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Ensure Mips::GP is properly reloaded after a function call. Patch by Sasa ↵Bruno Cardoso Lopes
Stankovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Negative zero is not legal on mips. Patch by Sasa StankovicBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123766 91177308-0d34-0410-b5e6-96231b3b80d8
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