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Original commit message:
Use the SSAUpdator to turn calls to eh.exception that are not in a
landing pad into uses of registers rather than loads from a stack
slot. Doesn't touch the 'orrible hack code - Bill needs to persuade
me harder :)
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The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.
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fragment
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vabd intrinsic and add and/or zext operations. In the case of vaba, this
also avoids the need for a DAG combine pattern to combine vabd with add.
Update tests. Auto-upgrade the old intrinsics.
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- Teach getShuffleScalarElt how to handle more target
specific nodes, so the DAGCombine can make use of it.
- Add another hack to avoid the node update problem
during legalization. More description on the comments
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stores.
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not a scrunched version of it.
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Patch by Cameron Esfahani!
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comments, these don't happen anymore.
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Thanks Chris!
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Remove #uses comments from functions: they we're padded out to column 50
and were potentially confusing for externally visible functions.
going further, remove the "<i8**> [#uses=3]" comments entirely. They
add a lot of noise, confuse people about what the IR is, and don't add
any particular value. When the types are long it makes it really really
hard to read IR.
If someone is interested in this sort of thing, the right way to do this
is to implement an AsmAnnotationWriter that produces the same output, and
add a flag to llvm-dis (only) to produce this output.
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and were potentially confusing for externally visible functions.
going further, remove the "<i8**> [#uses=3]" comments entirely. They
add a lot of noise, confuse people about what the IR is, and don't add
any particular value. When the types are long it makes it really really
hard to read IR.
If someone is interested in this sort of thing, the right way to do this
is to implement an AsmAnnotationWriter that produces the same output, and
add a flag to llvm-dis (only) to produce this output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112894 91177308-0d34-0410-b5e6-96231b3b80d8
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I wasn't able to convince myself that all GetMainExecutable
implementations always return absolute paths; this prevents
unexpected behavior in case they ever don't.
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large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs.
rdar://7352504
rdar://8374540
rdar://8355680
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default edges of
switches. Just return the conservatively correct answer.
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Patch by Jan Sjodin!
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capacity and remove the workaround in SmallVector<T,0>. There are some
theoretical benefits to a N->2N+1 growth policy anyway.
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lowering, and fix movlhps/movhlps to decode 4 elements shuffles
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there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.
This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.
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to be used elsewhere. Also trim trailing whitespaces
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locally.
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Minix apparently doesn't like double-slash separators, and there's
no apparent need for them here.
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LVI lattice, undef and the full set ConstantRange should not
be treated as equivalent.
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ARM register class allocation order functions to take advantage of that.
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after regalloc.
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and there seems to be no reason not to.
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intervals, and where the uses and defs of the original intervals were in the original code.
Spill intervals can be hidden using the "-rmf-intervals=virt-nospills*" option.
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I'm sure it is harmless. Original commit message:
If PrototypeValue is erased in the middle of using the SSAUpdator
then the SSAUpdator may access freed memory. Instead, simply pass
in the type and name explicitly, which is all that was used anyway.
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