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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96401 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96399 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96395 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96393 91177308-0d34-0410-b5e6-96231b3b80d8
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If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96389 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96388 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96387 91177308-0d34-0410-b5e6-96231b3b80d8
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non-temporal. Fix from r96241 for botched encoding of MOVNTDQ.
Add documentation for !nontemporal metadata.
Add a simpler movnt testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96386 91177308-0d34-0410-b5e6-96231b3b80d8
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to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96384 91177308-0d34-0410-b5e6-96231b3b80d8
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set of Defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96383 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96382 91177308-0d34-0410-b5e6-96231b3b80d8
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They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.
This patch handles ARM mode. Thumb2 will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96381 91177308-0d34-0410-b5e6-96231b3b80d8
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o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96380 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96378 91177308-0d34-0410-b5e6-96231b3b80d8
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terminator's list of successors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96377 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96372 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96370 91177308-0d34-0410-b5e6-96231b3b80d8
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branch in ARM v4 code, since it gets clobbered by the return address before
it is used. Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96360 91177308-0d34-0410-b5e6-96231b3b80d8
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methods to try to have the type predicates be more logically positioned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96349 91177308-0d34-0410-b5e6-96231b3b80d8
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and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96344 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96343 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96337 91177308-0d34-0410-b5e6-96231b3b80d8
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not the end of the field, fixing rdar://7651978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96330 91177308-0d34-0410-b5e6-96231b3b80d8
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Currently, whether a function is ISR or not is encoded in the section attribute for that function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96322 91177308-0d34-0410-b5e6-96231b3b80d8
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elimination. Before a DBG_VALUE could affect codegen.
The solution here is imperfect and not final.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96318 91177308-0d34-0410-b5e6-96231b3b80d8
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llvm-gcc but has been replaced with pad argument which don't need any
special backend support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96312 91177308-0d34-0410-b5e6-96231b3b80d8
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as it also peeks at which registers are being used by other uses. This
makes LSR less sensitive to use-list order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96308 91177308-0d34-0410-b5e6-96231b3b80d8
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at older buildbot messages, I see the failure predates
this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96307 91177308-0d34-0410-b5e6-96231b3b80d8
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finished.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96304 91177308-0d34-0410-b5e6-96231b3b80d8
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but it's harder to believe it's the other candidate,
so reverting. Temporarily I hope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96303 91177308-0d34-0410-b5e6-96231b3b80d8
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strict about the requirements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96301 91177308-0d34-0410-b5e6-96231b3b80d8
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We could almost use a multiclass for the signed/unsigned instructions, but
there are only 6 of them so I guess it's not worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96297 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96295 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96294 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96292 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96290 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96289 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
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early beginning! The "z" CIE augmentation mark indicates that there is an extra word containing the size of augmentation section. However, even for frames w/o any augmentation data we emitted size uleb! (this is the case of "unwinding through C code"). Thus frame moves information was emitterd completely wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96287 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96286 91177308-0d34-0410-b5e6-96231b3b80d8
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Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96285 91177308-0d34-0410-b5e6-96231b3b80d8
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'i1' type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96282 91177308-0d34-0410-b5e6-96231b3b80d8
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A virtual register can be used before it is defined in the same MBB if the MBB
is part of a loop. Teach the implicit-def pass about this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96279 91177308-0d34-0410-b5e6-96231b3b80d8
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Module (we were called with verifyFunction and an unowned Function) we can't
rely on Mod->getContext().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96275 91177308-0d34-0410-b5e6-96231b3b80d8
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fixes a crash using FPM on a Function that isn't owned by a Module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96273 91177308-0d34-0410-b5e6-96231b3b80d8
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functions not embedded within modules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96272 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96269 91177308-0d34-0410-b5e6-96231b3b80d8
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and the testcase needs improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96265 91177308-0d34-0410-b5e6-96231b3b80d8
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called by jump threading.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96263 91177308-0d34-0410-b5e6-96231b3b80d8
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IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
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