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Fix PR3522. It's not safe to sink into landing pad BB's.
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Fix pr3571: If stride is a value defined by an instruction, make sure it dominates the loop preheader. When IV users are strength reduced, the stride is inserted into the preheader. It could create a use before def situation.
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Make a transformation added in 63266 a bit less aggressive.
It was transforming (x&y)==y to (x&y)!=0 in the case where
y is variable and known to have at most one bit set (e.g. z&1).
This is not correct; the expressions are not equivalent when y==0.
I believe this patch salvages what can be salvaged, including
all the cases in bt.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64782 91177308-0d34-0410-b5e6-96231b3b80d8
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Don't try to set an EFLAGS operand to dead if no instruction was created.
This fixes a bug introduced by r61215.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64524 91177308-0d34-0410-b5e6-96231b3b80d8
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Fix a nasty bug (PR3550) where the inline pass could incorrectly mark
calls with the tail marker when inlining them through an invoke. Patch,
testcase, and perfect analysis by Jay Foad!
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Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.
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Fix PR 3471, and some cleanups.
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Fix PR3486. Fix a bug in code that manually patch physical register live interval after its sub-register is coalesced with a virtual register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64509 91177308-0d34-0410-b5e6-96231b3b80d8
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Pre-alloc splitting needs to be more careful to avoid inserting spills/restores
between call frame setup/restore points. Unfortunately, this regresses
code size a bit, but at least it's correct now!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64508 91177308-0d34-0410-b5e6-96231b3b80d8
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First initialize DAG otherwise dwarf writer is used uninitialized.
Duncan spotted this. Thanks!
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Tevert part of the x86 subtarget logic changes: when -march=x86-64
is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.
This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.
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did for LLVM 2.4. These are slated to be removed (PR3370) and we don't want to have to be backwards compatible with them in the future.
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Revert r63600.
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initial PHI nodes of the machine function.
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the index of the value being extracted is always an i32. This fixes PR3465
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crazy cases like:
struct f { int A, B, C, D, E, F; };
short test4() {
struct f A;
A.A = 1;
memset(&A.B, 2, 12);
return A.C;
}
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correct. We need more infrastructure before we can get the DebugLoc info for
these instructions.
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With the new world order, it can handle cases where the first
store into the alloca is an element of the vector, instead of
requiring the first analyzed store to have the vector type
itself. This allows us to un-xfail
test/CodeGen/X86/vec_ins_extract.ll.
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they are useful to analyses other than BasicAliasAnalysis.cpp. Include
the full comment for isIdentifiedObject in the header file. Thanks to
Chris for suggeseting this.
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created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.
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into SimplifySetCC which gets called elsewhere.
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information. This eliminates the need for the Flags field in MemSDNode,
so this makes LoadSDNode and StoreSDNode smaller. Also, it makes
FoldingSetNodeIDs for loads and stores two AddIntegers smaller.
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SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.
Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.
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except LegalizeOp itself.
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option to make the -fno- form on the option. We also document the new
form in the CommandLine documentation.
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direction.
Live interval reconstruction needs to account for this, and scour its maps to
prevent dangling references.
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among others.
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Add an assert to check HasX86_64 status.
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tests. Thanks for the beautiful reduced testcase Duncan!
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performance reasons. Provide a single virtual interface for directives of all sizes in non-default address spaces.
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and remove trailing whitespace. No functionality
change.
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