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sys::Memory::setExecutable on Win32 platform.
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expand to multiple basic blocks, in which case fast-isel
needs to informed of which block to use as it resumes
inserting instructions.
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was setting kill flags on tied uses in two-address instructions.
The kill flags were causing the allocator to think it could
allocate the use and its tied def in different registers.
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Make it all work in non-pic mode.
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applicable.
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Thanks Duncan!
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incidentally making the case where the memop is a
pointer deref work. Fix cmp-and-swap regression.
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While hosting instruction check PHI node.
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Instead, just create one, and make sure everything that needs
it can access it. Previously most of the SelectionDAGISel
subclasses all had their own TargetLowering object, which was
redundant with the TargetLowering object in the TargetMachine
subclasses, except on Sparc, where SparcTargetMachine
didn't have a TargetLowering object. Change Sparc to work
more like the other targets here.
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this handling to work properly for modifying stub functions, relocations
back to entry points after JIT compilation, etc..
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reg->reg moves.
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for global relocations that do need them (libc calls, for example).
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isReg, etc., from isRegister, etc.
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than the type an i1 is promoted to (eg: i8). Account
for this. Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!
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Why? Because it was there!
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the lock when calling a method which may materialize the llvm::Function.
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It turns out that this is a fairly common operation,
and it's easy enough to handle.
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getting inserted into the ValueMap. This avoids infinite
recursion in some rare cases.
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sequences like this:
sete %al
testb %al, %al
jne LBB11_1
with this:
je LBB11_1
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can be used when deciding if a block can transfer control to another
via a fall-through instead of a branch.
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so we don't lose copies when two of them have
the same source. I don't know what I was thinking when I wrote this originally.
Note: There's probably a more efficient way to do this, but I need to think about it some more, and about what determinism
guarantees need to be present.
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Contributed by Lang Hames.
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volatile memory references are safe to move.
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local register allocator's physreg liveness doesn't recognize subregs,
so it doesn't know that defs of %ecx that are immediately followed by
uses of %cl aren't dead. This comes up due to the way fast-isel emits
shift instructions.
This is a temporary workaround. Arguably, local regalloc should
handle subreg references correctly. On the other hand, perhaps
fast-isel should use INSERT_SUBREG instead of just assigning to the
most convenient super-register of %cl when lowering shifts.
This fixes MultiSource/Benchmarks/MallocBench/espresso,
MultiSource/Applications/hexxagon, and others, under -fast.
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a constant vector ("{0x123, 0x456}" syntax). The fix is to simplify the
_mm_srli_si128 macro, and move the "* 8" from the macro into the compiler
back-end. I can't change the existing __builtins because so many people are
using them :-(."
Patch by Stuart Hastings!
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& version as strings.
- Win32 code is untested.
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patch provided by Tomas Lindquist Olsen!
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This allows the 64-bit forms to use+def RSP instead of ESP. This
doesn't fix any real bugs today, but it is more precise and it
makes the debug dumps on x86-64 look more consistent.
Also, add some comments describing the CALL instructions' physreg
operand uses and defs.
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pointer bitcasts and GEP's", and centralize the
logic in Value::getUnderlyingObject. The
difference with stripPointerCasts is that
stripPointerCasts only strips GEPs if all
indices are zero, while getUnderlyingObject
strips GEPs no matter what the indices are.
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immediately.
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