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2013-02-19ELF symbol table field st_other support, Jack Carter
excluding visibility bits. Mips (Mips16) specific e_header setting. EF_MIPS_ARCH_ASE_M16 needs to be set in the ELF header flags for Mips16. Contributer: Reed Kotler git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175566 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ELF symbol table field st_other support, Jack Carter
excluding visibility bits. Mips (MicroMips) specific STO handling . The st_other field settig for STO_MIPS_MICROMIPS Contributer: Zoran Jovanovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Add obvious constantness.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175560 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ARM NEON: Don't need COPY_TO_REGCLASS in patternArnold Schwaighofer
In my previous commit: "Merge a f32 bitcast of a v2i32 extractelt A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers." I added a pattern containing a copy_to_regclass. The copy_to_regclass is actually not needed. radar://13191881 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ARM: Allocation hints must make sure to be in the alloc order.Jim Grosbach
When creating an allocation hint for a register pair, make sure the hint for the physical register reference is still in the allocation order. rdar://13240556 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175541 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Hexagon: Sync TSFlags in MCTargetDesc/HexagonBaseInfo.h withJyotsna Verma
HexagonInstrFormats.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175537 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Clean up HiPE prologue emission a bit and avoid signed arithmetic tricks.Benjamin Kramer
No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175536 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Move LLVM_LIBRARY_VISIBILITY for consistency with what was done toRafael Espindola
PPCJITInfo.cpp in r175394. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175531 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Make ARMAsmPrinter pass name more precise and fix comment.Eli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175527 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Make pass name more precise and fix comment.Eli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175525 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ARM NEON: Merge a f32 bitcast of a v2i32 extracteltArnold Schwaighofer
A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers. The patch fixes this by using a COPY_TO_REGCLASS and a EXTRACT_SUBREG to extract the element from the vector instead. radar://13191881 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175520 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Add AR_X to the R600_TReg_X register class.Tom Stellard
NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175519 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Mark all members of the TRegMem register class as reservedTom Stellard
This stops the Machine Verifier from complaining about uses of undefined physical registers. NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175518 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Fix scheduler crash caused by invalid MachinePointerInfoTom Stellard
Kernel function arguments are lowered to loads from the PARAM_I address space. When creating these load instructions, we were initializing their MachinePointerInfo with an Arguement object that was not attached to any function. This was causing the MachineScheduler to crash when it tried to access the parent of the Arguement. This has been fixed by initializing the MachinePointerInfo with a UndefValue instead. NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175517 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Fix tracking of implicit defs in the IndirectAddressing passTom Stellard
In some cases, we were losing track of live implicit registers which was creating dead defs and causing the scheduler to produce invalid code. NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175516 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Fix capitalization in comment to match function name.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175497 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,Reed Kotler
BtnezT8SltiX16, BtnezT8SltiuX16 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175486 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Remove some unused private fields from the AArch64MCCodeEmitter. TheseChandler Carruth
fields were only ever set in the constructor. The create method retains its consistent interface so that these bits can be re-threaded through the emitter if they're ever needed. This was found by the -Wunused-private-field Clang warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175482 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175474 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Use array_pod_sort instead of std::sort.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175472 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18X86FrameLowering.cpp: Fixup. Sorry for the breakage.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175467 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Use LLVM_DELETED_FUNCTION rather than '// do not implement' comments.David Blaikie
Also removes some redundant DNI comments on function declarations already using the macro. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175466 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18X86FrameLowering.cpp: Fix a warning in -Asserts. [-Wunused-variable]NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175464 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Remove a useless assert.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175463 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18[fast-isel] Remove an invalid assert.Chad Rosier
If the memcpy has an odd length with an alignment of 2, this would incorrectly assert on the last 1 byte copy. rdar://13202135 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175459 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Fix a 32/64 bit incompatibility in the HiPE prologue generation.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175458 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Support for HiPE-compatible code emission, patch by Yiannis Tsiouris.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175457 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad patternVincent Lejeune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175446 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18R600: Support for TBOVincent Lejeune
NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18R600: Increase number of ArrayBase Reg to 32Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard at amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175443 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175420 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Expand pseudo/macro BteqzT8SltuX16 . There is no test case becauseReed Kotler
at this time, llvm is generating a different but equivalent pattern that would lead to this instruction. I am trying to think of a way to get it to generate this. If I can't, I may just remove the pseudo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175419 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Expand pseudo/macro BteqzT8SltX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Expand macro/pseudo BteqzT8CmpX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175416 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Beginning of expanding all current mips16 macro/pseudo instruction sequences.Reed Kotler
This expansion will be moved to expandISelPseudos as soon as I can figure out how to do that. There are other instructions which use this ExpandFEXT_T8I816_ins and as soon as I have finished expanding them all, I will delete the macro asm string text so it has no way to be used in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17X86: Add a note.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175408 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17[XCore] Add missing 2r instructions.Richard Osborne
These instructions are not targeted by the compiler but it is needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17[XCore] Add TSETR instruction.Richard Osborne
This instruction is not targeted by the compiler but it is needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175406 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17[XCore] Add missing u10 / lu10 instructions.Richard Osborne
These instructions are not targeted by the compiler but they are needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175404 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17[XCore] Add missing u6 / lu6 instructions.Richard Osborne
These instructions are not targeted by the compiler but they are needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17Return false instead of 0.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17AArch64: Avoid shifts by 64, that's undefined behavior.Benjamin Kramer
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-17Make the visibility of LLVMPPCCompilationCallback work with GCC.Benjamin Kramer
GCC warns about the attribute being ignored if it occurs after void*. There seems to be some kind of incompatibility between clang and gcc here, but I can't fathom who's right. void* LLVM_LIBRARY_VISIBILITY foo(); // clang: hidden, gcc: default LLVM_LIBRARY_VISIBILITY void *bar(); // clang: hidden, gcc: hidden void LLVM_LIBRARY_VISIBILITY qux(); // clang: hidden, gcc: hidden git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16Clean up mips16 td file in preparation for massive pseudo lowering work.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175379 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16TypoRenato Golin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175371 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16One more try to make this look nice. I have lots of pseudo lowering Reed Kotler
as well as 16/32 bit variants to do and so I want this to look nice when I do it. I've been experimenting with this. No new test cases are needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175369 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16[msvc x64] Update X86CompilationCallback_Win64.asm corresponding to r175267.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16Target/R600/CMakeLists.txt: Prune SILowerLiteralConstants.cpp corresponding ↵NAKAMURA Takumi
to r175354. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16Minor cleanups. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175359 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16R600/SI: Add pattern to simplify i64 loadingChristian Konig
This is a candidate for the stable branch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175356 91177308-0d34-0410-b5e6-96231b3b80d8
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