aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Collapse)Author
2012-11-09Add support for -mstrict-align compiler option for ARM targets.Chad Rosier
rdar://12340498 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167620 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09indentNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08Recommit modified r167540.Amara Emerson
Improve ARM build attribute emission for architectures types. This also changes the default architecture emitted for a generic CPU to "v7". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167574 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08Add support of RTM from TSX extensionMichael Liao
- Add RTM code generation support throught 3 X86 intrinsics: xbegin()/xend() to start/end a transaction region, and xabort() to abort a tranaction region git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka
Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07Delete MipsFunctionInfo::NextStackOffset. No functionality change intended. Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07Revert r167540 until regression tests are updated.Amara Emerson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07Improve ARM build attribute emission for architectures types.Amara Emerson
This also changes the default architecture emitted for a generic CPU to "v7". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07[arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier
classes. For my test case the number of errors drop from 356 to 21. Part of rdar://12594152 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167508 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06Simplify code. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06Make the helper functions static. No functional change.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167501 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier
registers. Previously, the register we being marked as implicitly defined, but not killed. In some cases this would cause the register scavenger to spill a dead register. Also, use an empty register mask to simplify the logic and to reduce the memory footprint. rdar://12592448 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167499 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06CostModel: add another known vector trunc optimization.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167488 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06Cost Model: add tables for some avx type-conversion hacks.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06Remove tailing whitespacesMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167445 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick
This is in preparation for adding "weak" DAG edges, but generally simplifies the design. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Refactor the getTypeLegalizationCost interface. No functionality change.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05CostModel: Add tables for the common x86 compares.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167421 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Code Model: Improve the accuracy of the zext/sext/trunc vector cost estimation.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167412 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Suppress signed/unsigned comparison warning.Richard Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Cost Model: Normalize the insert/extract index when splitting typesNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167402 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Cost Model: teach the cost model about expanding integers.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167401 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05On PowerPC64, integer return values (as well as arguments) are supposedUlrich Weigand
to be extended to a full register. This is modeled in the IR by marking the return value (or argument) with a signext or zeroext attribute. However, while these attributes are respected for function arguments, they are currently ignored for function return values by the PowerPC back-end. This patch updates PPCCallingConv.td to ask for the promotion to i64, and fixes LowerReturn and LowerCallResult to implement it. The new test case verifies that both arguments and return values are properly extended when passing them; and also that the optimizers understand incoming argument and return values are in fact guaranteed by the ABI to be extended. The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll, since the test case used a "ret" instruction to create a use of an i32 value at the end of the function (to set up data flow as required for what the test is intended to test). Since there's now an implicit promotion to i64, that data flow no longer works as expected. To fix this, this patch now adds an extra "add" to ensure we have an appropriate use of the i32 value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Implement the cost of abnormal x86 instruction lowering as a table.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Add support for the PowerPC-specific inline asm Z constraint and y modifier.Hal Finkel
The Z constraint specifies an r+r memory address, and the y modifier expands to the "r, r" in the asm string. For this initial implementation, the base register is forced to r0 (which has the special meaning of 0 for r+r addressing on PowerPC) and the full address is taken in the second register. In the future, this should be improved. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167388 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05[PATCH] PowerPC: Expand load extend vector operationsAdhemerval Zanella
This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for vector types when altivec is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167386 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-04Remove alignments from folding tables for scalar FMA4 instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03[mips] Set flag neverHasSideEffects flag on floating point conversionAkira Hatanaka
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03X86 CostModel: Add support for a some of the common arithmetic instructions ↵Nadav Rotem
for SSE4, AVX and AVX2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03[mips] Set flag isAsCheapAsAMove flag on instruction LUi.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03[mips] Stop reserving register AT and use register scavenger when a scratchAkira Hatanaka
register is needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02[mips] Do not reserve all 64-bit registers, but only the ones which need to beAkira Hatanaka
reserved. Without this fix, RegScavenger::getRegsAvailable incorrectly returns an empty set of integer registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02Add a stub for the x86 cost model impl. Implement a basic cost rule for ↵Nadav Rotem
inserting/extracting from XMM registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167333 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02Scalar Bitcasts and Truncs are usually freeNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167323 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02Vext Lowering was missing opportunitiesQuentin Colombet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167318 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02[mips] Use register number instead of name to print register $AT.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167315 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02[mips] Add function MipsFrameLowering::estimateStackSize.Akira Hatanaka
This function estimates stack size and will be called before PrologEpilogInserter scans the callee-saved registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02[mips] Add member field MipsFunctionInfo::IncomingArgSize which holds the sizeAkira Hatanaka
of the incoming argument area. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02[mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directiveAkira Hatanaka
"set .noat" so that the assembler doesn't issue warnings when register $AT is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Use the relationship models infrastructure to add two relations - getPredOpcodePranav Bhandarkar
and getPredNewOpcode. The first relates non predicated instructions with their predicated forms and the second relates predicated instructions with their predicate-new forms. Patch by Jyotsna Verma! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Revert the majority of the next patch in the address space series:Chandler Carruth
r165941: Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis. Despite this commit log, this change primarily changed stuff outside of VMCore, and those changes do not carry any tests for correctness (or even plausibility), and we have consistently found questionable or flat out incorrect cases in these changes. Most of them are probably correct, but we need to devise a system that makes it more clear when we have handled the address space concerns correctly, and ideally each pass that gets updated would receive an accompanying test case that exercises that pass specificaly w.r.t. alternate address spaces. However, from this commit, I have retained the new C API entry points. Those were an orthogonal change that probably should have been split apart, but they seem entirely good. In several places the changes were very obvious cleanups with no actual multiple address space code added; these I have not reverted when I spotted them. In a few other places there were merge conflicts due to a cleaner solution being implemented later, often not using address spaces at all. In those cases, I've preserved the new code which isn't address space dependent. This is part of my ongoing effort to clean out the partial address space code which carries high risk and low test coverage, and not likely to be finished before the 3.2 release looms closer. Duncan and I would both like to see the above issues addressed before we return to these changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Revert the series of commits starting with r166578 which introduced theChandler Carruth
getIntPtrType support for multiple address spaces via a pointer type, and also introduced a crasher bug in the constant folder reported in PR14233. These commits also contained several problems that should really be addressed before they are re-committed. I have avoided reverting various cleanups to the DataLayout APIs that are reasonable to have moving forward in order to reduce the amount of churn, and minimize the number of commits that were reverted. I've also manually updated merge conflicts and manually arranged for the getIntPtrType function to stay in DataLayout and to be defined in a plausible way after this revert. Thanks to Duncan for working through this exact strategy with me, and Nick Lewycky for tracking down the really annoying crasher this triggered. (Test case to follow in its own commit.) After discussing with Duncan extensively, and based on a note from Micah, I'm going to continue to back out some more of the more problematic patches in this series in order to ensure we go into the LLVM 3.2 branch with a reasonable story here. I'll send a note to llvmdev explaining what's going on and why. Summary of reverted revisions: r166634: Fix a compiler warning with an unused variable. r166607: Add some cleanup to the DataLayout changes requested by Chandler. r166596: Revert "Back out r166591, not sure why this made it through since I cancelled the command. Bleh, sorry about this! r166591: Delete a directory that wasn't supposed to be checked in yet. r166578: Add in support for getIntPtrType to get the pointer type based on the address space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Cleanup another place redundant SP maintainedMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31(For X86) Enhancement to add-carray/sub-borrow (adc/sbb) optimization.Shuxin Yang
The adc/sbb optimization is to able to convert following expression into a single adc/sbb instruction: (ult) ... = x + 1 // where the ult is unsigned-less-than comparison (ult) ... = x - 1 This change is to flip the "x >u y" (i.e. ugt comparison) in order to expose the adc/sbb opportunity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Fix a bug in the cost calculation of vector casts. Detect situations where ↵Nadav Rotem
bitcasts cost zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31[mips] Set isAsCheapAsAMove flag on ADDiu and DADDiu, which enablesAkira Hatanaka
re-materialization of immediate loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Implement ADJCALLSTACKUP and ADJCALLSTACKDOWNReed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Add scalar forms of FMA4 VFNMSUB/VFNMADD to folding tables. Patch from ↵Craig Topper
Cameron McInally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167106 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Clean up redundant SP register maintained in X86 TLIMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31This patch addresses an ABI compatibility issue with empty aggregateBill Schmidt
parameters. Examples of these are: struct { } a; union { } b[256]; int a[0]; An empty aggregate has an address, although dereferencing that address is pointless. When passed as a parameter, an empty aggregate does not consume a protocol register, nor does it consume a doubleword in the parameter save area. Passing an empty aggregate by reference passes an address just as for any other aggregate. Returning an empty aggregate uses GPR3 as a hidden address of the return value location, just as for any other aggregate. The patch modifies PPCTargetLowering::LowerFormalArguments_64SVR4 and PPCTargetLowering::LowerCall_64SVR4 to properly skip empty aggregate parameters passed by value. The handling of return values and by-reference parameters was already correct. Built on powerpc64-unknown-linux-gnu and tested with no new regressions. A test case is included to test proper handling of empty aggregate parameters on both sides of the function call protocol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167090 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-07-17 20:58:42 +0000