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2011-07-26Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng
MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Clean up a pile of hacks in our CMake build relating to TableGen.Chandler Carruth
The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to ↵Evan Cheng
createMCAsmBackend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25ARM assembly parsing and encoding for SSAT16 instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128Bruno Cardoso Lopes
This also fixes PR10452 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add remaining 256-bit vector bitcasts. This also fixes PR10451Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25- Handle special scalar_to_vector case: splats. Using a native 128-bitBruno Cardoso Lopes
shuffle before inserting on a 256-bit vector. - Add AVX versions of movd/movq instructions - Introduce a few COPY patterns to match insert_subvector instructions. This turns a trivial insert_subvector instruction into a register copy, coalescing the xmm into a ymm and avoid emiting on more instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Reintroduce r135730, this is indeed the right approach, there is noBruno Cardoso Lopes
native 256-bit vector instruction to do scalar_to_vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add a note about efficient codegen for binary log.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25ARM assembly parsing and encoding for SSAT instruction.Jim Grosbach
Fix the Rn register encoding for both SSAT and USAT. Update the parsing of the shift operand to correctly handle the allowed shift types and immediate ranges and issue meaningful diagnostics when an illegal value or shift type is specified. Add aliases to parse an ommitted shift operand (default value of 'lsl #0'). Add tests for diagnostics and proper encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Refactoring fail.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Move CBackend and CppBackend MC initialization to TargetInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Get rid of an incorrect optimization for shuffles with PALIGNR and simplify ↵Eli Friedman
isPALIGNRMask. Addresses PR10466, although the crash from that PR only triggers in cases where DAGCombine misses optimizing a shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Fix more MC layering violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135979 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25More MC layering violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add LLVMAddTargetLibraryInfo to the C API.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Separate MCInstPrinter registration from AsmPrinter registration.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Simply ARM so_reg MIOperandInfo definitions.Jim Grosbach
The shift immediate encoding, printing, etc. is handled directly by the enclosing operand definition, so it should be a vanilla immediate, not a nested complex operand (shift_imm). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Fix last bits of MC layer issues. llvm-mc doesn't need to initialize ↵Evan Cheng
TargetMachine's anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25ARM asm operand renaming. Make things a bit more explicit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25More simple cleanup of ARM asm operand definitions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135958 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Code clean up.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Refactor MBlaze target to separate MC routines from Target routines.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Update the comment. This feature is available only on Darwin at the moment. ↵Bill Wendling
Though it's not Darwin-specific. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Make assembly parser method names more consistent.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135950 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Unbreak the build.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Tidy up formatting.Jim Grosbach
Remove some inititalizers that are the same as the default, move defs next to their (singular) uses and generally simplify some formatting of asm operand definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Tidy up a bit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135945 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Missed a file.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Refactor PPC target to separate MC routines from Target routines.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135942 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25More refactoring.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Refactor X86 target to separate MC code from Target code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135930 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Changed disabled code into a flag.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Remove dead variable.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135923 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25After we've modified the prolog to save volatile registers, generate the compactBill Wendling
unwind encoding for that function. This simply crawls through the prolog looking for machine instrs marked as "frame setup". It can calculate from these what the compact unwind should look like. This is currently disabled because of needed linker support. But initial tests look good. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-24Set PPCII::MO_DARWIN_STUB only on MacOSX < 10.5.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23ARMMCTargetDesc.h: Fixup to add DataTypes.h, or uint32_t would be unavailable.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where ↵Evan Cheng
they belong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23createXXXMCCodeGenInfo should be static.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23Sink ARM mc routines into MCTargetDesc.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135825 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22ARM SSAT instruction 5-bit immediate handling.Jim Grosbach
The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield. Update the representation such that we store the operand as 0-31, allowing us to remove the encoder method and the special case handling in the disassembler. Update the assembly parser and the instruction printer accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22ARM assembly parsing and encoding updates.Jim Grosbach
Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,Evan Cheng
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Fix PR10422 by adding the necessary AVX UCOMISD memory versions toBruno Cardoso Lopes
load folding logic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135801 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22ARM assembly parsing and encoding of SMLAL instruction.Jim Grosbach
Fix parsing of carry-setting variant SMLALS and add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135797 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22ARM encoding and assembly parsing of SMLAD{X} instructions.Jim Grosbach
Fix encoding of destination register. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135796 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Add v8f32->v8i32 bitcast. Fixes PR10440Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Turn shuffles into unpacks for VT == MVT::v2i64 and MVT::v2f64Rafael Espindola
too. Patch by Jeff Muizelaar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Fix x86's XALUO lowering to return its replacement values insteadDan Gohman
of doing the RAUW calls for the overflow value itself. This makes it more consistent with how the rest of LegalizeDAG works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135788 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Fix test failures caused by my so_reg refactoring.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135785 91177308-0d34-0410-b5e6-96231b3b80d8
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