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2006-03-24Handle more shuffle cases with SHUFP* instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27000 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23TypoEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26997 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Add PPC vector bit-convert supportChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26995 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Add support to locate local variables in frames (early version.)Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Change interface to DwarfWriter.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26991 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Modify how CBE handles #lines.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26990 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Fix the encodings of these new instructions, hopefully fixing the JITChris Lattner
failures from last night git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26981 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Following icc's lead: use movdqa to load / store 128-bit integer vectorsEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Eliminate IntrinsicLowering from TargetMachine.Chris Lattner
Make the CBE and V9 backends create their own, since they're the only ones that use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26974 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23remove always-null IntrinsicLowering argument.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26971 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Add v4i32 <-> v4f32 bitconvert patterns.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26969 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Add 128-bit integer vector load and add (for testing).Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26967 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Add support for 8 bit immediates with 16/32 bit cmp instructionsNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26966 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not doEvan Cheng
64-bit vector shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22SHUFP* are two address code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26959 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22Some clean up.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22- Supposely movlhps is faster / better than unpcklpd.Evan Cheng
- Don't forget pshufd is only available with sse2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26956 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22- Implement X86ISelLowering::isShuffleMaskLegal(). We currently only supportEvan Cheng
splat and PSHUFD cases. - Clean up shuffle / splat matching code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22- VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matchesEvan Cheng
PSHUFD. We can make permutes entries which point to the undef pointing anything we want. - Change some names to appease Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26951 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26950 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22Fix PSHUF* and SHUF* jit code emission problemsEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26949 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22This has been implemented. Tweak it into another noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26944 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22When possible, custom lower 32-bit SINT_TO_FP to this:Chris Lattner
_foo2: extsw r2, r3 std r2, -8(r1) lfd f0, -8(r1) fcfid f0, f0 frsp f1, f0 blr instead of this: _foo2: lis r2, ha16(LCPI2_0) lis r4, 17200 xoris r3, r3, 32768 stw r3, -4(r1) stw r4, -8(r1) lfs f0, lo16(LCPI2_0)(r2) lfd f1, -8(r1) fsub f0, f1, f0 frsp f1, f0 blr This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s with llcbeta (16.7% and 38.1% respectively). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22Add support for "ri" addressing modes where the immediate is a 14-bit fieldChris Lattner
which is shifted left two bits before use. Instructions like STD use this addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26942 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22fix a warningChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22Some splat and shuffle support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26940 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22Add a couple more pseudo instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22Fix the JIT encoding of the VAForm_1 instructions, including vmaddfpChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21Didn't mean to check this in. No MMX support yet.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21- Use movaps to store 128-bit vector integers.Evan Cheng
- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21Don't emit pseudo instructions!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21Update readmeNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26924 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21Print absolute memory references like this:Chris Lattner
lwz r2, 8(0) instead of this: lwz r2, 8(r0) This fixes the llc/llc-beta failures on PPC last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21Combine 2 entriesEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26921 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21Add a note about x86 register coallescingEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21- Remove scalar to vector pseudo ops. They are just wrong.Evan Cheng
- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS and MOVAPD. Mark them as move instructions and *hope* they will be deleted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21With Evan's latest tblgen patch, this code is obsolete, thanks Evan!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21minor noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26912 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21x86 ISD::SCALAR_TO_VECTOR support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21Junk unused vector register classes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20Handle constant addresses more efficiently, folding the low bits into theChris Lattner
disp field of the load/store if possible. This compiles CodeGen/PowerPC/load-constant-addr.ll to: _test: lis r2, 2838 lfs f1, 26848(r2) blr instead of: _test: lis r2, 2838 ori r2, r2, 26848 lfs f1, 0(r2) blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26908 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20remove dead variableChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20Fix a couple of bugs in permute/splat generate, thanks to Nate for actuallyChris Lattner
figuring these out! :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26904 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20reenable this hack, the tblgen version isn't quite readyChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26902 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20Fix the pattern for VADDUWM, add i32 splatChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26901 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20Use tblgen'd VECTOR_SHUFFLE selection code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26900 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20Add support for generating vspltw, instead of a vperm instruction with aChris Lattner
constant pool load. This generates significantly nicer code for splats. When tblgen gets bugfixed, we can remove the custom selection code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26898 91177308-0d34-0410-b5e6-96231b3b80d8
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