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2006-06-27Add 64-bit MTCTR so that indirect calls work.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28931 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Fix an incorrect store pattern. This fixes em3d.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Implement 64-bit undef, sub, shl/shr, srem/uremChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28929 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Use i32 for shift amounts instead of i64. This gets bisort working.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28927 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Add zextload from i32 -> i64, with this, perimeter works.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works inChris Lattner
ppc64 mode! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Fix variable shadowing issueChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (butChris Lattner
doesn't work right). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28921 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26Rearrange compares, add ADDI8, add sext from 32-to-64 bit registerChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26Improve PPC64 calling convention supportChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26Remove two more definitionsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28918 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26remove two unused instructions.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-24Simplify X86CompilationCallback: always align to 16-byte boundary; don't ↵Evan Cheng
save EAX/EDX if unnecessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-23Add and sort "sections" in debug lines. This always stepping throughJim Laskey
code in sections other than ".text", including weak sections like ctors and dtors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28909 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-22Eliminate unneeded parameter.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21variable_ops instructions such as call can have any number of operands.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21Add memory operand and int regsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28896 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21inline asm, at least for floatsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21fix argument problemAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21Correct returns of 64-bit values, though they seemed to work before...Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28892 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Make these predicates correct in 64-bit mode too.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit fileChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20remove unused flagChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28888 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20add some logical opsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20remove some unused patternsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28886 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Add some more immediate patterns. This allows us to compile:Chris Lattner
void test6() { Y = 0xABCD0123BCDE4567; } into: _test6: lis r2, -21555 lis r3, ha16(_Y) ori r2, r2, 291 rldicr r2, r2, 32, 31 oris r2, r2, 48350 ori r2, r2, 17767 std r2, lo16(_Y)(r3) blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 isChris Lattner
set, so disable the pattern in that case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Add some 64-bit logical ops.Chris Lattner
Split imm16Shifted into a sext/zext form for 64-bit support. Add some patterns for immediate formation. For example, we now compile this: static unsigned long long Y; void test3() { Y = 0xF0F00F00; } into: _test3: li r2, 3840 lis r3, ha16(_Y) xoris r2, r2, 61680 std r2, lo16(_Y)(r3) blr GCC produces: _test3: li r0,0 lis r2,ha16(_Y) ori r0,r0,61680 sldi r0,r0,16 ori r0,r0,3840 std r0,lo16(_Y)(r2) blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20__i386__, __i386, etc. are not defined for x86-64. Use __x86_64__.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28881 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-2064-bit bugfix: 0xFFFF0000 cannot be formed with a single lis.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28880 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Add some patterns for globals, so we can now compile this:Chris Lattner
static unsigned long long X, Y; void test1() { X = Y; } into: _test1: lis r2, ha16(_Y) lis r3, ha16(_X) ld r2, lo16(_Y)(r2) std r2, lo16(_X)(r3) blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Remove some now-unneeded casts from instruction patterns. With the castsChris Lattner
removed, tblgen produces identical output to with them in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Add some patterns for ppc64Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Remove some ugly now-redundant casts.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20Fix some mismatched type constraintsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-19Minor clean up.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-18initial implementation of ARMRegisterInfo::eliminateFrameIndexRafael Espindola
fixes test/Regression/CodeGen/ARM/ret_arg5.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17A new entry.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17Implement the getPointerRegClass method, which is required for the ptr_rcChris Lattner
magic to work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Later models likely to have Yonah like attributes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Upgrade some load/store instructions to use the proper addressing mode stuff.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16In 64-bit mode, addr mode operands use G8RC instead of GPRC.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16fix some assumptions that pointers can only be 32-bits. With this, we canChris Lattner
now compile: static unsigned long X; void test1() { X = 0; } into: _test1: lis r2, ha16(_X) li r3, 0 stw r3, lo16(_X)(r2) blr Totally amazing :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Split 64-bit instructions out into a separate .td fileChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Force 64-bit register availability in 64-bit mode. For real.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Remove the -darwin and -aix llc options, inferring darwinism and aixism fromChris Lattner
the target triple & subtarget info. woo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Don't pass target name into TargetData anymore, it is never used or needed.Chris Lattner
Remove explicit casts to std::string now that there is no overload resolution issues in the TargetData ctors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Remove ctor with each piece specifyable (which causes overload ambiguities),Chris Lattner
add a new init method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Document the subtarget features better, make sure that 64-bit mode, 64-bitChris Lattner
support, and 64-bit register use are all consistent with each other. Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this to configure TargetData differently. This not makes ppc64 blow up on lots of stuff :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16Rename some subtarget features. A CPU now can *have* 64-bit instructions,Chris Lattner
can in 32-bit mode we can choose to optionally *use* 64-bit registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
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