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Chris. This will be accomplished through correctly modeling CR's and
subregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23056 91177308-0d34-0410-b5e6-96231b3b80d8
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_test:
srawi r2, r3, 2
addze r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23052 91177308-0d34-0410-b5e6-96231b3b80d8
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is used by the int -> FP code among other things. This gets
2005-05-12-Int64ToFP past that failure, to dying on lack of support for add_parts
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around to functions and stuff
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to codegen this: float foo() { return 1.245; }
into this:
_foo:
lis r2, ha16(.CPI_foo_0)
lfs f1, lo16(.CPI_foo_0)(r2)
blr
instead of this:
_foo:
lis r2, ha16(.CPI_foo_0)
lfs r2, lo16(.CPI_foo_0)(r2) <-- ouch
or f1, r2, r2 <-- ouch
blr
with the dag isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23029 91177308-0d34-0410-b5e6-96231b3b80d8
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instructions take a consistent reg class. Implement ISD::UNDEF in the dag->dag
selector to generate this, fixing UnitTests/2003-07-06-IntOverflow.
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Emit the indcall sequence as:
mtctr inreg
mr R12, inreg
btctr
If inreg and R12 aren't coallesced, this reduces the odds of having the mtctr
and btctr in the same dispatch group. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23023 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23020 91177308-0d34-0410-b5e6-96231b3b80d8
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target independent code in SelectionDAG.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23002 91177308-0d34-0410-b5e6-96231b3b80d8
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Prefer 'neg X' to 'subfic 0, X' since neg does not set XER[CA]
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Prefer 'neg X' to 'subfic 0, X' since it does not set XER[CA]
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Call stil not supported yet
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x%y for 'rem' on fp values.
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LowercaseString
in the asmprinter. This changes the .td files to use lower case register names,
avoiding the need to do this call. This speeds up the asmprinter from 1.52s
to 1.06s on kc++ in a release build.
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It used to crash on any function that took float arguments.
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float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, %Q
ret float %R
}
By returning the right result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22961 91177308-0d34-0410-b5e6-96231b3b80d8
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that is conditionally executed
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simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22952 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22951 91177308-0d34-0410-b5e6-96231b3b80d8
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it in the block. This codegens:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
as:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
li r4, 1
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r2, r4, r4
.LBB_test_2: ;
or r3, r2, r2
blr
... which is one fewer instruction. The savings are more significant for
global address and constantfp nodes.
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This REALLY should be lowered by the legalizer!
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namespace instead of the reg class namespace. Update getRegClassForType()
to use modified names due to tblgen change.
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