aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Collapse)Author
2010-03-18Check if function names start with "llvm." before trying to lookup them up asBob Wilson
intrinsics. The intrinsic lookup code assumes that this check has been done and assumes the names are at least 6 characters long. Valgrind complained about this. pr6638. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18Try to fix a valgrind error on 32 bit platforms: use %zu instead of %llu to ↵Benjamin Kramer
format a size_t. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98810 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18MC/Darwin: Add a new target hook for whether the target uses "reliable" ↵Daniel Dunbar
symbol differences, basically whether the assembler should attempt to understand atoms when using scattered symbols. Also, avoid some virtual call overhead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17X86 address mode matching code MatchAddressRecursively does some aggressive ↵Evan Cheng
hack which require doing a RAUW. It may end up deleting some SDNode up stream. It should avoid referencing deleted nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98780 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17Revert 98745 with respect to the addition of NEONFrm subformats for disassembly.Johnny Chen
There is a better way coming up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98777 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17Fixed a bug in the IT mask printing where T means the cond bit in the maskJohnny Chen
matches that of Firstcond[0] and E means otherwise. The Firstcond[0] is also tagged in the Mask to facilitate Asm printing. The disassembler also depends on this arrangement. This is similar to what's described in A2.5.2 ITSTATE. Ran: utils/lit/lit.py test/CodeGen/ARM test/CodeGen/Thumb test/CodeGen/Thumb2 successfully. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98775 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17Refines 98745 so that it only contains the patch related to the output of theJohnny Chen
addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. This patch removes the impl of printT2AddrModeImm8s4OffsetOperand() from ARMAsmPrinter.cpp. It is used by disassembler as of now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17Clean up whitespace.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17Increase format field from 5 to 6 bits. ARMII::FormMask was increased to 0x3fBob Wilson
in svn r74988 but the format field was never widened. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98768 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17Initialize Size member to appease valgrind.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98763 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-1798745 contains something unrelated to the patch.Johnny Chen
Remove it from ARMAddressingModes.h. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98751 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrmJohnny Chen
instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17fix GetOrCreateTemporarySymbol to require a name, clientsChris Lattner
should use CreateTempSymbol() if they don't care about the name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98712 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Revert 98683. It is breaking something in the disassembler.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Remove redundant writeback flag from ARM address mode 6. Also remove theBob Wilson
optional register update argument, which is currently unused -- when we add support for that, it can just be a separate operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16reapply r98656 unmodified, which exposed the asmprinter not Chris Lattner
handling constant unions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Disambiguate the *_UPD and * variants by specifying the writeback flag as 1.Johnny Chen
This is for the disassembly work. There are cases where this is not possible, for example, A8.6.53 LDM Encoding T1. In such case, we'll use an adhoc approach to deduce the Opcode programmatically. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98679 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Revert r98656, its breaking all over the place.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98662 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16improve support for uniontype and ConstantUnion, patch by Tim Northover!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98656 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Remove redundant writeback flag in ARM addressing mode 5.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98648 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Remove the writeback flag from ARM's address mode 4. Now that we have separateBob Wilson
instructions for ld/st with writeback, the flag is completely redundant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98643 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Fix unused variable warnings.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98642 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16--- Reverse-merging r98637 into '.':Bob Wilson
U test/CodeGen/ARM/tls2.ll U test/CodeGen/ARM/arm-negative-stride.ll U test/CodeGen/ARM/2009-10-30.ll U test/CodeGen/ARM/globals.ll U test/CodeGen/ARM/str_pre-2.ll U test/CodeGen/ARM/ldrd.ll U test/CodeGen/ARM/2009-10-27-double-align.ll U test/CodeGen/Thumb2/thumb2-strb.ll U test/CodeGen/Thumb2/ldr-str-imm12.ll U test/CodeGen/Thumb2/thumb2-strh.ll U test/CodeGen/Thumb2/thumb2-ldr.ll U test/CodeGen/Thumb2/thumb2-str_pre.ll U test/CodeGen/Thumb2/thumb2-str.ll U test/CodeGen/Thumb2/thumb2-ldrh.ll U utils/TableGen/TableGen.cpp U utils/TableGen/DisassemblerEmitter.cpp D utils/TableGen/RISCDisassemblerEmitter.h D utils/TableGen/RISCDisassemblerEmitter.cpp U Makefile.rules U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/Makefile U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h D lib/Target/ARM/Disassembler U lib/Target/ARM/ARMInstrFormats.td U lib/Target/ARM/ARMAddressingModes.h U lib/Target/ARM/Thumb2ITBlockPass.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.Bob Wilson
This does not move entirely to UAL syntax, since the default "increment after" suffix is empty but we still use "IA" for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16fix the same bug on the x86-64 side of the fence.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98616 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16fix the encoding of TAILJMPd. This fixes Benchmarks/Olden/bisortChris Lattner
with the integrated assembler! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98615 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Wrap a long line and add some parens to be consistent.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15MC: Allow modifiers in MCSymbolRefExpr, and eliminate X86MCTargetExpr.Daniel Dunbar
- Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue. - This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98592 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Recognize code for doing vector gather/scatter index calculations withDan Gohman
32-bit indices. Instead of shuffling each element out of the index vector, when all indices are needed, just store the input vector to the stack and load the elements out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Translate "cc" clobber in ARM inline assembly to ARM::CCRRegisterClass.Bob Wilson
Radar 7459078. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and ↵Daniel Dunbar
external relocations, but we don't have x86_64 relocations yet). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Now that the default for Darwin platforms is to place the LSDA into the TEXTBill Wendling
section, remove the target-specific code that performs this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98580 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15use Mang->getSymbol() Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98578 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Place the LSDA into the TEXT section for x86 Darwin. If the global it's pointingBill Wendling
to is local to the translation unit, we need to place fill the value of that symbol into the non-lazy pointer. This should conclude all Darwin changes for placing the LSDA into the TEXT section. There is some cleanup to do. I.e., there's no longer a special need for target-specific code here. But that can come later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Avoid sibcall optimization if either caller or callee is using sret semantics.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98561 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15do some serious surgery on CellSPU to get it back into a worldChris Lattner
where it uses types consistently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98532 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15fix a few more ambiguous types.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15add some missing typesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98530 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Tell Valgrind when we modify already-executed machine code so it knowsJeffrey Yasskin
to re-instrument the code. We depend on the system valgrind.h to avoid adding a new license. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15fix an ambiguous pattern, contrary to expectations, scalar_to_vectorChris Lattner
doesn't have a type constraint on the scalar because we don't have an 'sAny' type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14tidy indentationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14no really, all 64-bit cpu's have cmov support. This shouldChris Lattner
fix the rest of the buildbot failures on non-x86 hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98522 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14all 64-bit cpus have cmov, this should fix CodeGen/X86/cmov.llChris Lattner
(at least) on non-x86 builders. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14Fix jit encoding bugs.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), notChris Lattner
the operand type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14Add substarget feature for FP16Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98503 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14Add codegen support for FP16 on ARMAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14add support for pentium class CPUs which do not have cmov,Chris Lattner
PR4841. Patch by Craig Smith! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98496 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-07-16 07:02:11 +0000