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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100578 91177308-0d34-0410-b5e6-96231b3b80d8
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There is probably a more elegant way to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100573 91177308-0d34-0410-b5e6-96231b3b80d8
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Radar 7770501.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100568 91177308-0d34-0410-b5e6-96231b3b80d8
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When a frame pointer is not otherwise required, and dynamic stack alignment
is necessary solely due to the spilling of a register with larger alignment
requirements than the default stack alignment, the frame pointer can be both
used as a general purpose register and a frame pointer. That goes poorly, for
obvious reasons. This patch brings back a bit of old logic for identifying
the use of such registers and conservatively reserves the frame pointer
during register allocation in such cases.
For now, implement for X86 only since it's 32-bit linux which is hitting this,
and we want a targeted fix for 2.7. As a follow-on, this will be expanded
to handle other targets, as theoretically the problem could arise elsewhere
as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100559 91177308-0d34-0410-b5e6-96231b3b80d8
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This fixes the Bullet regression on i386/nocona.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100553 91177308-0d34-0410-b5e6-96231b3b80d8
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Operand 2 on a load instruction does not have to be a RegisterSDNode for this to
work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100497 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100480 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100466 91177308-0d34-0410-b5e6-96231b3b80d8
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isn't well specified. ARM really needs to have its instprinter
finished at some point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100439 91177308-0d34-0410-b5e6-96231b3b80d8
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with spaces in them. Sym->getName() != OS << *Sym
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100434 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100423 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100416 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100415 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100412 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100404 91177308-0d34-0410-b5e6-96231b3b80d8
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uint32_t insn;
MemoryObject.readBytes(Address, 4, (uint8_t*)&insn, NULL)
to read 4 bytes of memory contents into a 32-bit uint variable. This leaves the
interpretation of byte order up to the host machine and causes PPC test cases of
arm-tests, neon-tests, and thumb-tests to fail. Fixed to use a byte array for
reading the memory contents and shift the bytes into place for the 32-bit uint
variable in the ARM case and 16-bit halfword in the Thumb case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100403 91177308-0d34-0410-b5e6-96231b3b80d8
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allowing xcore to use the normal runOnMachineFunction
implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100402 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100399 91177308-0d34-0410-b5e6-96231b3b80d8
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When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100381 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100380 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100379 91177308-0d34-0410-b5e6-96231b3b80d8
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buildbots started complaining since this commit. Also xfail ARM disassembly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100378 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100377 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100376 91177308-0d34-0410-b5e6-96231b3b80d8
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which is really a property of the section being referenced.
Add a predicate to MCSection to replace it.
Yay for reduction in magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100367 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100358 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100357 91177308-0d34-0410-b5e6-96231b3b80d8
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Restrict bit mask operations to the DomainValue class. Rename methods for
clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100353 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100352 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100342 91177308-0d34-0410-b5e6-96231b3b80d8
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enough to warrant caching in AsmPrinter, so remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100336 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100332 91177308-0d34-0410-b5e6-96231b3b80d8
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"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100322 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100321 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100320 91177308-0d34-0410-b5e6-96231b3b80d8
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don't have mcstreamer support for yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100319 91177308-0d34-0410-b5e6-96231b3b80d8
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implementations to use EmitRawText instead of writing
directly to "O".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100318 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100317 91177308-0d34-0410-b5e6-96231b3b80d8
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streamerized for everything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100316 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100315 91177308-0d34-0410-b5e6-96231b3b80d8
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which will abort in .o file writing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100314 91177308-0d34-0410-b5e6-96231b3b80d8
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raw_ostream to print to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100313 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100312 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100311 91177308-0d34-0410-b5e6-96231b3b80d8
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raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100307 91177308-0d34-0410-b5e6-96231b3b80d8
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member of AsmPrinter. Instead, pass it in explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
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Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100304 91177308-0d34-0410-b5e6-96231b3b80d8
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of printOffset to pass in a stream to print to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100296 91177308-0d34-0410-b5e6-96231b3b80d8
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