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2012-03-23Include cstdio in a few place that depended on getting it transitively ↵Benjamin Kramer
through StringExtras.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-23Move ftostr into its last user (cppbackend) and simplify it a bit.Benjamin Kramer
New code should use raw_ostream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153326 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-23Remove the C backend.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-22Added soft fail checks for the disassembler when decoding some corner cases ↵Silviu Baranga
of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153252 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-22Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or ↵Silviu Baranga
LDRSHT instruction on ARM git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-22Added soft fail cases for the disassembler when decoding MUL instructions on ↵Silviu Baranga
ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-22Remove some unnecessary forward declarations.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-22PPC::DBG_VALUE must use Reg+Imm frame-index elimination even for large ↵Hal Finkel
offsets. Fixes PR12203. I don't have a small test case yet, but I'll try to construct one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153240 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-21Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby
case for all opcodes handed by DecodeVSTInstruction() in ARMDisassembler.cpp . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-21Put Is64BitMemOperand into !defined(NDEBUG) for now.Joerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-21Use a signed value for this enum to avoid spuriuos warnings from gcc.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153184 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-21Fix generation of the address size override prefix. Add assertions forJoerg Sonnenberger
the invalid cases. At least 16bit operand in 64bit mode is currently not rejected in the parser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-21Add typecast to silence -Wswitch warning introduced by r153153.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153155 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-21Spacing fixes and using 'unsigned' instead of 'int' to index to select ↵Craig Topper
shuffle elements for consistency with other shuffle code in X86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153154 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-21Incremental big endian patch by Jack Carter.Akira Hatanaka
These changes allow us to compile big endian from the command line for 32 bit Mips targets. This patch will result in code and data actually being produced in the correct endianess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20[avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu toChad Rosier
vextractf128 with 128-bit mem dest. Combines vextractf128 $0, %ymm0, %xmm0 vmovaps %xmm0, (%rdi) to vextractf128 $0, %ymm0, (%rdi) rdar://11082570 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153139 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Change conditional instructions definitions, e.g. ANDCC, ARMPseudoExpand and ↵Evan Cheng
t2PseudoExpand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20remove unused variableMatt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153116 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20[avx] Add the AddedComplexity to the VINSERTI128 avx2 patterns to giveChad Rosier
precedence over the VINSERTF128 avx1 patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Require a base pointer for stack realignment when SP may vary dynamically.Bob Wilson
ARMBaseRegisterInfo::canRealignStack was checking for variable-sized objects but not for stack adjustments around calls. Use hasReservedCallFrame() to check for both. The hasBasePointer function was already correctly checking both conditions, so the effect of this was that a base pointer would be used without checking whether the base pointer register could be reserved. I don't have a small testcase for this. <rdar://problem/11075906> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Remove some redundant checks.Bob Wilson
ARMFrameLowering::hasReservedCallFrame is already checking for variable sized objects, so there's no point in checking it twice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Whitespace.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153105 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20[avx] Move the vextractf128 patterns closer to the vextractf128 def. RemoveChad Rosier
whitespace from test case. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Fix assembling ARM vst2 instructions with double-spaced registers.Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20ARM non-scattered MachO relocations for movw/movt.Jim Grosbach
Needed when building -mdynamic-no-pic code. rdar://10459256 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20[avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads.Chad Rosier
This results in things such as vmovups 16(%rdi), %xmm0 vinsertf128 $1, %xmm0, %ymm0, %ymm0 to be combined to vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 rdar://11076953 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20The ARM instructions that have an unpredictable behavior when the pc ↵Silviu Baranga
register operand is given now fail with soft fail. Modified the regression tests to reflect this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Test Commit - add a newlineRichard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Remove code that prevented lowering shuffles if they are used by load and ↵Craig Topper
themselves used by a extract_vector_elt. This was done to allow the DAG combiner to collapse to a single element load. Unfortunately, sometimes the extract_vector_elt would disappear before DAG combine could do the transformation leaving a vector_shuffle that isel couldn't handle. New code lets the shuffle be converted to a target specific node, but then adds a combine routine that can convert target specific nodes back to vector_shuffles if the folding criteria are met. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Factor out target shuffle mask decoding from getShuffleScalarElt and use a ↵Craig Topper
SmallVector of int instead of unsigned for shuffle mask in decode functions. Preparation for another change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-19fix a build failure with libc++Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-19ARM branch relaxation for unconditional t1 branches.Jim Grosbach
rdar://11059157 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153055 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-19ARM assembly, accept optional '#' on lane index number.Jim Grosbach
rdar://11057160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153053 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-19Perform mul combine when multiplying wiht negative constants.Anton Korobeynikov
Patch by Weiming Zhao! This fixes PR12212 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-19This patch adds X86 instruction itineraries for non-pseudo opcodes inPreston Gurd
X86InstrCompiler.td. It also adds –mcpu-generic to the legalize-shift-64.ll test so the test will pass if run on an Intel Atom CPU, which would otherwise produce an instruction schedule which differs from that which the test expects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153033 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-19Add a note for -ffast-math optimization of vector norm.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-18isCommutedMOVLMask should only look at 128-bit vectors to match isMOVLMask.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper
some superfluous forward declarations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17Fix some copy and paste remnants of Cell and SPU in Hexagon files.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152981 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17Fix typo in file header.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152980 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17Pass TargetOptions to HexagonTargetMachine constructor by reference to match ↵Craig Topper
other targets and the base class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16Check if we can handle the arguments of a call (and therefore the call) inBill Wendling
fast-isel before emitting code. If the program bails after code was emitted, then it could lead to the stack being adjusted more than once (two CALLSEQ_BEGINs emitted) but being adjuste back only once after the call. This leads to general badness and gnashing of teeth. <rdar://problem/11050630> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152959 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16ARM fix silly typo in optional operand alias.Jim Grosbach
rdar://11065671 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16ARM divided syntax fmrx/fmxr mnemonics.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152946 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16ARM ldm/stm register lists can be out of order.Jim Grosbach
It's not a good style idea, as the registers will be laid down in memory in numerical order, not the order they're in the list, but it's legal. vldm/vstm are stricter. rdar://11064740 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152943 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16ARM optional operand on MRC/MCR assembly instructions.Jim Grosbach
rdar://11058464 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16ARM vmrs system registers mvfr0 and mvfr1 handling.Jim Grosbach
rdar://11058464 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15Remove inadvertant commit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152870 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15[fast-isel] Address Eli's comments for r152847. Specifically, add a test caseChad Rosier
and still allow immediate encoding, just not with cmn. rdar://11038907 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152869 91177308-0d34-0410-b5e6-96231b3b80d8
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