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2011-08-29Explicitly zero out parts of a vector which are required to be zero by the ↵Eli Friedman
algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand ↵Owen Anderson
encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138760 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29addrmode_imm12 and addrmode2_offset encode their immediate values ↵Owen Anderson
differently. Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12. Should fix a number of nightly test failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Improve handling of #-0 offsets for many more pre-indexed addressing modes.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well ↵Eli Friedman
enough to fix properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Update the load-store optimizer for changes to the operands on LDR_PRE_IMM ↵Owen Anderson
and LDRB_PRE_IMM in r138653. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Move non-intruction patterns to a more appropriate place!Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Add support for parsing #-0 on non-memory-operand immediate values, and add ↵Owen Anderson
a testcase that necessitates it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28Remove premature previous commit.Nicolas Geoffray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138725 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28Encoding of instructions referencing segments has changed. Do what ↵Nicolas Geoffray
X86MCCodeEmitter does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138723 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27Silence GCC warnings and make an array const.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Improve encoding support for BLX with immediat eoperands, and fix a BLX ↵Owen Anderson
decoding bug this uncovered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Correct encoding of BL with immediate offset.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26ARM assembly parsing tweak for pldw.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Spelling fail.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138667 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Thumb2 assembler parsing and encoding of IT instruction.Jim Grosbach
This handles only the handling of the IT instruction itself, not the processing and validation of the instructions in the IT block. That's next, and will include encoding tests for IT itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Fix ARM codegen breakage caused by r138653.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We ↵Owen Anderson
were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Update for feedback from Jim.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26ARMDisassembler: Always return a size, even when disassembling fails.Benjamin Kramer
This should fix PR10772. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Support an extension of ARM asm syntax to allow immediate operands to ADR ↵Owen Anderson
instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Don't insert branch hint lables that are never used. Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Fix PR10755 by checking for invalid predicate codes from UNPREDICTABLE t2IT ↵Owen Anderson
instructions when decoding their successors. This is the last disassembly crash detected by exhaustive Thumb2 instruction space. Major thanks to Chandler Carruth for making this kind of exhaustive testing possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Fix disassembling of VCVTSD2SICraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Atomic load/store on ARM/Thumb.Eli Friedman
I don't really like the patterns, but I'm having trouble coming up with a better way to handle them. I plan on making other targets use the same legalization ARM-without-memory-barriers is using... it's not especially efficient, but if anyone cares, it's not that hard to fix for a given target if there's some better lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Do the same as r138461. Mark VZEROALL as clobbering all YMM registersBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Remove stray fullstop.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Add support for AVX 256-bit version of MOVDDUP!Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138588 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Make isMOVDDUP mask check more strict and update comments!Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Port over additional encoding tests to decoding tests, and fix an operand ↵Owen Anderson
ordering bug this exposed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25ARM fix for missing implicit operands on ldmia_ret.Andrew Trick
rdar://10005094: miscompile of 176.gcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Explicitly disallow predication in Thumb1 assembly.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138562 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Add more missing TB encodings to VEX instructions to allow them to be ↵Craig Topper
disassembled. Fixes remainder of PR10678. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be ↵Craig Topper
disassembled. Fixes PR10723. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Add support for 256-bit versions of VSHUFPD and VSHUFPS.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Add memory version of SHUFPD to mask decoding!Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Hide -global-merge option.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Add a command line option to disable global merge pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Remove a out-of-place comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Create a section for non-instructions patterns in the beginning of theBruno Cardoso Lopes
file, and move more code around! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Move code around!Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Organize UNPCK* patterns, also add remaining for AVX.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138519 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicateBruno Cardoso Lopes
the missing ones for AVX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Organize and tidy up MOVDDUP section. Also update comments!Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Move MOVHLPS patterns close to MOVHLPS definition, and duplicate theBruno Cardoso Lopes
pattern for 128-bit AVX mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Move all PSHUF* patterns close to the PSHUF* definitions. Also beBruno Cardoso Lopes
explicit about which subtarget they refer to, and add AVX versions of the ones we currently don't. Remove old and now wrong comments! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Move all SHUFP* patterns close to the SHUFP* definitions. Also beBruno Cardoso Lopes
explicit about which subtarget they refer to, and add AVX versions of the ones we currently don't. Make the mask check more strict, to be clear it won't be used to match to 256-bit versions! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138514 91177308-0d34-0410-b5e6-96231b3b80d8
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