aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Collapse)Author
2009-09-30The AsmPrinter base class contains a DwarfWriter member, so there's no needBob Wilson
for derived AsmPrinters to add another one. In some cases, fixing this removes the need to override the doInitialization method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83170 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Clarify comment phrasing.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83148 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Add a option which would move ld/st multiple pass before post-alloc scheduling.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83145 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30When checking whether we need to reserve a register for the scavenger,Jim Grosbach
the size of the saved frame pointer needs to be taken into account. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83136 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Add "isBarrier = 1" to return instructions.Jim Grosbach
Patch by Sylvere Teissier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83135 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30For Darwin, emit all the text section directives together before the dwarfBob Wilson
section directives. This causes the assembler to put the text sections at the beginning of the object file, which helps work around a limitation of the Darwin ARM relocations. Radar 7255355. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Remove -post-RA-schedule flag and add a TargetSubtarget method to enable ↵David Goodwin
post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-29minor cleanup and add clarifying commentJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83117 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-29Remove std::string uses from DebugInfo interface.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-29Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83058 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28Adjust processFunctionBeforeCalleeSavedScan() to correctly reserve a stackJim Grosbach
slot for the register scavenger when compiling Thumb1 functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83023 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28Fix Thumb2 IT block pass bug. t2MOVi32imm may not be the start of a IT block.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28Introduce the TargetInstrInfo::KILL machine instruction and get rid of theJakob Stoklund Olesen
unused DECLARE instruction. KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF in the places where IMPLICIT_DEF is just used to alter liveness of physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28Pass the optimization level when constructing the ARM instruction selector.Bob Wilson
Otherwise, it is always set to "default", which prevents debug info from even being generated during isel. Radar 7250345. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudoEvan Cheng
instruction. This makes it re-materializable. Thumb2 will split it back out into two instructions so IT pass will generate the right mask. Also, this expose opportunies to optimize the movw to a 16-bit move. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28Fix thinko in my recent movt commit: it's not safe to remat movt, since it ↵Anton Korobeynikov
has input reg argument. Disable rematting of it for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82975 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27Use movt/movw pair to materialize 32 bit constants on ARMv6T2+.Anton Korobeynikov
This should be better than single load from constpool. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27LBRX no longer has an explicit SrcValueSDNode operand, so the typeDan Gohman
operand is now at index 2, rather than 3. This fixes the "Invalid child # of SDNode!" failures on PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82942 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27Use explicit structs instead of std::pair to map callee saved regs to spill ↵Tilmann Scheller
slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27Enable pre-regalloc load / store multiple pass for Thumb2.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-26Really remove this option.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-26Remove a couple of unused command line options.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82837 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-26Add comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25RegenerateAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25Code clean up and prepare for Thumb2 support. No functionality changes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82805 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25Improve MachineMemOperand handling.Dan Gohman
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions. This eliminates MachineInstr's std::list member and allows the data to be created by isel and live for the remainder of codegen, avoiding a lot of copying and unnecessary translation. This also shrinks MemSDNode. - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated fields for MachineMemOperands. - Change MemSDNode to have a MachineMemOperand member instead of its own fields with the same information. This introduces some redundancy, but it's more consistent with what MachineInstr will eventually want. - Ignore alignment when searching for redundant loads for CSE, but remember the greatest alignment. Target-specific code which previously used MemOperandSDNodes with generic SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range so that the SelectionDAG framework knows that MachineMemOperand information is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25Rename getTargetNode to getMachineNode, for consistency with theDan Gohman
naming scheme used in SelectionDAG, where there are multiple kinds of "target" nodes, but "machine" nodes are nodes which represent a MachineInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82790 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25Finish scheduling itineraries for NEON.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82788 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25Add some comments to clarify things that I discovered this week.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82773 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.Bob Wilson
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public interface" it must be 8-byte aligned. For the older ARM APCS ABI, the stack alignment is just always 4 bytes. For X86, we currently align SP at entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment is needed at other times, such as for a leaf function. After discussing this with Dan, I decided to go with the approach of adding a new "TransientStackAlignment" field to TargetFrameInfo. This value specifies the stack alignment that must be maintained even in between calls. It defaults to 1 except for ARM, where it is 4. (Some other targets may also want to set this if they have similar stack requirements. It's not currently required for PPC because it sets targetHandlesStackFrameRounding and handles the alignment in target-specific code.) The existing StackAlignment value specifies the alignment upon entry to a function, which is how we've been using it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25Don't try to use pre-indexed addressing with sthbrx/stwbrxDan Gohman
instructions. This fixes a PowerPC bug exposed by some unrelated changes I'm working on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24Start of revamping the register scavenging in PEI. ARM Thumb1 is the drivingJim Grosbach
interest for this, as it currently reserves a register rather than using the scavenger for matierializing constants as needed. Instead of scavenging registers on the fly while eliminating frame indices, new virtual registers are created, and then a scavenged collectively in a post-pass over the function. This isolates the bits that need to interact with the scavenger, and sets the stage for more intelligent use, and reuse, of scavenged registers. For the time being, this is disabled by default. Once the bugs are worked out, the current scavenging calls in replaceFrameIndices() will be removed and the post-pass scavenging will be the default. Until then, -enable-frame-index-scavenging enables the new code. Currently, only the Thumb1 back end is set up to use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24unconditionally request MMIChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24Make the end-of-itinerary mark explicit. Some cleanup.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82709 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23Checkpoint NEON scheduling itineraries.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23Use getStoreSize() instead of getStoreSizeInBits()/8.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23Rename several variables from EVT to more descriptive names, now that EVTDan Gohman
is also the name of their type, as declarations like "EVT EVT" look really odd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23Remove BlackfinRegisterInfo::getFrameIndexOffset since it is the same as theBob Wilson
default implementation. Update comment on the default version, which made it sound like most targets override it. Currently only X86 and SystemZ override this method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82651 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23ARM does not support offset folding (yet). Disable it for now.Anton Korobeynikov
This fixes PR5031. Unfortunately, there is no small testcase :( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82643 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23Fix X86's unfoldMemoryOperand to properly handle MachineMemOperands.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21Add Cortex-A8 VFP model.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82483 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21Add support for rematerializing FsFLD0SS and FsFLD0SD as constant-poolDan Gohman
loads in order to reduce register pressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21Recognize SSE min and max opportunities in even more cases.Dan Gohman
And fix a bug with the behavior of min/max instructions formed from fcmp uge comparisons. Also, use FiniteOnlyFPMath() for this code instead of UnsafeFPMath, as it is more specific. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21Fix the offset values for these memoperands. For frame objects, theDan Gohman
PseudoSourceValue already effectively represents the offset from the frame base, so the actual offset should not be added to it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82465 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21Register the MachineModuleInfo for the ARM JIT, and update JITDwarfEmitter toDaniel Dunbar
assert if the setModuleInfo hasn't been called. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82441 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21one case handled, expanded another testcase inline.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82427 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-20Implement the JIT side of the GDB JIT debugging interface. To enable thisReid Kleckner
feature, either build the JIT in debug mode to enable it by default or pass -jit-emit-debug to lli. Right now, the only debug information that this communicates to GDB is call frame information, since it's already being generated to support exceptions in the JIT. Eventually, when DWARF generation isn't tied so tightly to AsmPrinter, it will be easy to push that information to GDB through this interface. Here's a step-by-step breakdown of how the feature works: - The JIT generates the machine code and DWARF call frame info (.eh_frame/.debug_frame) for a function into memory. - The JIT copies that info into an in-memory ELF file with a symbol for the function. - The JIT creates a code entry pointing to the ELF buffer and adds it to a linked list hanging off of a global descriptor at a special symbol that GDB knows about. - The JIT calls a function marked noinline that GDB knows about and has put an internal breakpoint in. - GDB catches the breakpoint and reads the global descriptor to look for new code. - When sees there is new code, it reads the ELF from the inferior's memory and adds it to itself as an object file. - The JIT continues, and the next time we stop the program, we are able to produce a proper backtrace. Consider running the following program through the JIT: #include <stdio.h> void baz(short z) { long w = z + 1; printf("%d, %x\n", w, *((int*)NULL)); // SEGFAULT here } void bar(short y) { int z = y + 1; baz(z); } void foo(char x) { short y = x + 1; bar(y); } int main(int argc, char** argv) { char x = 1; foo(x); } Here is a backtrace before this patch: Program received signal SIGSEGV, Segmentation fault. [Switching to Thread 0x2aaaabdfbd10 (LWP 25476)] 0x00002aaaabe7d1a8 in ?? () (gdb) bt #0 0x00002aaaabe7d1a8 in ?? () #1 0x0000000000000003 in ?? () #2 0x0000000000000004 in ?? () #3 0x00032aaaabe7cfd0 in ?? () #4 0x00002aaaabe7d12c in ?? () #5 0x00022aaa00000003 in ?? () #6 0x00002aaaabe7d0aa in ?? () #7 0x01000002abe7cff0 in ?? () #8 0x00002aaaabe7d02c in ?? () #9 0x0100000000000001 in ?? () #10 0x00000000014388e0 in ?? () #11 0x00007fff00000001 in ?? () #12 0x0000000000b870a2 in llvm::JIT::runFunction (this=0x1405b70, F=0x14024e0, ArgValues=@0x7fffffffe050) at /home/rnk/llvm-gdb/lib/ExecutionEngine/JIT/JIT.cpp:395 #13 0x0000000000baa4c5 in llvm::ExecutionEngine::runFunctionAsMain (this=0x1405b70, Fn=0x14024e0, argv=@0x13f06f8, envp=0x7fffffffe3b0) at /home/rnk/llvm-gdb/lib/ExecutionEngine/ExecutionEngine.cpp:377 #14 0x00000000007ebd52 in main (argc=2, argv=0x7fffffffe398, envp=0x7fffffffe3b0) at /home/rnk/llvm-gdb/tools/lli/lli.cpp:208 And a backtrace after this patch: Program received signal SIGSEGV, Segmentation fault. 0x00002aaaabe7d1a8 in baz () (gdb) bt #0 0x00002aaaabe7d1a8 in baz () #1 0x00002aaaabe7d12c in bar () #2 0x00002aaaabe7d0aa in foo () #3 0x00002aaaabe7d02c in main () #4 0x0000000000b870a2 in llvm::JIT::runFunction (this=0x1405b70, F=0x14024e0, ArgValues=...) at /home/rnk/llvm-gdb/lib/ExecutionEngine/JIT/JIT.cpp:395 #5 0x0000000000baa4c5 in llvm::ExecutionEngine::runFunctionAsMain (this=0x1405b70, Fn=0x14024e0, argv=..., envp=0x7fffffffe3c0) at /home/rnk/llvm-gdb/lib/ExecutionEngine/ExecutionEngine.cpp:377 #6 0x00000000007ebd52 in main (argc=2, argv=0x7fffffffe3a8, envp=0x7fffffffe3c0) at /home/rnk/llvm-gdb/tools/lli/lli.cpp:208 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82418 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-20update an entry, delete an entry which has been fixed.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-20--- Reverse-merging r82282 into '.':Bill Wendling
U lib/CodeGen/AsmPrinter/DwarfException.cpp U lib/CodeGen/AsmPrinter/DwarfException.h --- Reverse-merging r82274 into '.': U lib/Target/TargetLoweringObjectFile.cpp G lib/CodeGen/AsmPrinter/DwarfException.cpp These revisions were breaking everything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82396 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-02 21:22:36 +0000