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2009-10-14Make isSafeToClobberEFLAGS more aggressive. Teach it to scan backwardsDan Gohman
(for uses marked kill and defs marked dead) a few instructions in addition to forwards. Also, increase the maximum number of instructions to scan, as it appears to help in a fair number of cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Correct comment about ARM immediates using '#' not '$' and TODO for modifiers.Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13s/DebugLoc.CompileUnit/DebugLoc.Scope/gDevang Patel
s/DebugLoc.InlinedLoc/DebugLoc.InlinedAtLoc/g git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13More Neon clean-up: avoid the need for custom-lowering vld/st-lane intrinsicsBob Wilson
by creating TargetConstants during instruction selection instead of during legalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13More bits of the ARM target assembler for llvm-mc to parse immediates.Kevin Enderby
Also fixed a couple of coding style things that crept in. And added more to the temporary hacked up ARMAsmParser::MatchInstruction() method for testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13NEON VLD/VST are now fully implemented. For operations that expand toBob Wilson
multiple instructions, the expansion is done during selection so there is no need to do anything special during legalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Revise ARM inline assembly memory operands to require the memory address toBob Wilson
be in a register. The previous use of ARM address mode 2 was completely arbitrary and inappropriate for Thumb. Radar 7137468. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Fix method name in comment, per Bob Wilson.Sandeep Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84017 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Add ARMv6T2 SBFX/UBFX instructions. Approved by Anton Korobeynikov.Sandeep Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Update CMake file (lexically order files).Ted Kremenek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Add some ARM instruction encoding bits.Bob Wilson
Patch by Johnny Chen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Fix regression introduced by r83894.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Fix a tab. Thanks to Johnny Chen for pointing it out.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Fix two warnings about unused variables that are only used in assert() calls.Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Delete a comment that makes no sense to me. The statement that moving a CPEBob Wilson
before its reference is only supported on ARM has not been true for a while. In fact, until recently, that was only supported for Thumb. Besides that, CPEs are always a multiple of 4 bytes in size, so inserting a CPE should have no effect on Thumb alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83916 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Fix a problem in the code where ARMAsmParser::ParseShift() second argumentKevin Enderby
should have been a pointer to a reference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83915 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Change CreateNewWater method to return NewMBB by reference.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83905 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Last week, ARMConstantIslandPass was failing to converge for theBob Wilson
MultiSource/Benchmarks/MiBench/automotive-susan test. The failure has since been masked by an unrelated change (just randomly), so I don't have a testcase for this now. Radar 7291928. The situation where this happened is that a constant pool entry (CPE) was placed at a lower address than the load that referenced it. There were in fact 2 CPEs placed at adjacent addresses and referenced by 2 loads that were close together in the code. The distance from the loads to the CPEs was right at the limit of what they could handle, so that only one of the CPEs could be placed within range. On every iteration, the first CPE was found to be out of range, causing a new CPE to be inserted. The second CPE had been in range but the newly inserted entry pushed it too far away. Thus the second CPE was also replaced by a new entry, which in turn pushed the first CPE out of range. Etc. Judging from some comments in the code, the initial implementation of this pass did not support CPEs placed _before_ their references. In the case where the CPE is placed at a higher address, the key to making the algorithm terminate is that new CPEs are only inserted at the end of a group of adjacent CPEs. This is implemented by removing a basic block from the "WaterList" once it has been used, and then adding the newly inserted CPE block to the list so that the next insertion will come after it. This avoids the ping-pong effect where CPEs are repeatedly moved to the beginning of a group of adjacent CPEs. This does not work when going backwards, however, because the entries at the end of an adjacent group of CPEs are closer than the CPEs earlier in the group. To make this pass terminate, we need to maintain a property that changes can only happen in some sort of monotonic fashion. The fix used here is to require that the CPE for a particular constant pool load can only move to lower addresses. This is a very simple change to the code and should not cause any significant degradation in the results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Another minor clean-up.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Remove redundant parameter.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Use early exit to reduce indentation.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Change to return a value by reference.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Add a typedef for an iterator.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83872 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Revert the kludge in 76703. I got a cleanDale Johannesen
bootstrap of FSF-style PPC, so there is some reason to believe the original bug (which was never analyzed) has been fixed, probably by 82266. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Don't forget to mark RAX as live-out of the function when arranging forDan Gohman
it to hold the address of an sret return value, for x86-64 ABI purposes. Also, fix the test that was originally intended to test this to actually test it, using FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83853 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Fix PR5087, patch by Jakub Staszak!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83822 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11Add missed mem-mem move patternsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinementsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11Implement 'm' memory operand properlyAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83785 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11Implement proper asmprinting for the globals. This eliminates bogus "call" ↵Anton Korobeynikov
modifier and also adds support for offsets wrt globals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83784 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11Implement asm printing for inline asm memory operandsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10It seems that OR operation does not affect status reg at all.Anton Korobeynikov
Remove impdef of SRW. This fixes PR4779 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10Remove a no-longer-necessary #include.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10Replace X86's CanRematLoadWithDispOperand by calling the target-independentDan Gohman
MachineInstr::isInvariantLoad instead, which has the benefit of being more complete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83696 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Mark the LDR instruction with isReMaterializable, as it is rematerializableDan Gohman
when loading from an invariant memory location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83688 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Add a const qualifier.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83677 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Added another bit of the ARM target assembler to llvm-mc to parse registerKevin Enderby
lists. Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on errors so 0-15 values could be returned as register numbers. Also added the rest of the arm register names to the currently hacked up version to allow more testing. Some changes to ARMAsmParser::ParseOperand to give different errors for things not yet supported and some additions to the hacked ARMAsmParser::MatchInstruction to allow more testing for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Fix the x86 test-shrink optimization so that it doesn't shrink comparisonsDan Gohman
when one of the bits being tested would end up being the sign bit in the narrower type, and a signed comparison is being performed, since this would change the result of the signed comparison. This fixes PR5132. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Add basic infrastructure and x86 support for preserving MachineMemOperandDan Gohman
information when unfolding memory references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.Bob Wilson
Also fix some copy-and-paste errors in previous changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via ↵Anton Korobeynikov
movt/movw pair. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Clean up some unnecessary initializations.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83566 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Clean up a comment (indentation was wrong).Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83565 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add missing names for the XCore specific LADD and LSUB nodes.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add some peepholes for signed comparisons using ashr X, X, 32.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83549 91177308-0d34-0410-b5e6-96231b3b80d8
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