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2009-10-19switch hidden gv stubs to use MachineModuleInfoMachO instead of a custom map.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19use MachineModuleInfoMachO for non-lazy gv stubs instead of a private map.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19remove dead mapChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19don't bother trying to avoid emitting redundant constant pool alignment ↵Chris Lattner
directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19remove accidental comment.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19emit .subsections_via_symbols through MCStreamer instead of textually.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19cleanup doFinalization -> EmitEndOfAsmFile.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19PR 5245 - The imediate size target flag was not set on 3A-prefixed SSSE3 ↵Nate Begeman
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19Fix PR5247, "lock addq" pattern (and other atomics), it DOES modify EFLAGS.Torok Edwin
LLC was scheduling compares before the adds causing wrong branches to be taken in programs, resulting in misoptimized code wherever atomic adds where used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19Add support for matching shuffle patterns with palignr.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18Turn on post-alloc scheduling for x86.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18Oops. I forgot to change the tests first. Disable post-alloc scheduling.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18-Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixedEvan Cheng
stack slots and giving them different PseudoSourceValue's did not fix the problem of post-alloc scheduling miscompiling llvm itself. - Apply Dan's conservative workaround by assuming any non fixed stack slots can alias other memory locations. This means a load from spill slot #1 cannot move above a store of spill slot #2. - Enable post-alloc scheduling for x86 at optimization leverl Default and above. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18Only fixed stack objects and spill slots should be get FixedStack ↵Evan Cheng
PseudoSourceValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84411 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Distinquish stack slots from other stack objects. They (and fixed objects) ↵Evan Cheng
get FixedStack PseudoSourceValues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Revert 84315 for now. Re-thinking the patch.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Rename getFixedStack to getStackObject. The stack objects represented are notEvan Cheng
necessarily fixed. Only those will negative frame indices are "fixed." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84315 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Remove MallocInst from LLVM Instructions.Victor Hernandez
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84299 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Change createPostRAScheduler so it can be turned off at llc -O1.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Update CMake file.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Cleaned up some code. No functionality change.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84251 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16I am no spelling bee.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84250 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Enable post-alloc scheduling for all ARM variants except for Thumb1.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84249 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Add comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Fix more NEON instruction encodings.Bob Wilson
Patch by Johnny Chen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Revert svn r80498 and replace it with a different solution. The only problemBob Wilson
I can see with the original code was that I forgot that this runs after type legalization and hence the result type will always be i32. (Custom legalization of EXTRACT_VECTOR_ELT is only enabled for vector types with 8- and 16-bit elements.) Regarding the FIXME comment: any information about sign and zero-extension should be captured by separate extension operations. The DAG combiner should handle those to produce either VGETLANEu or VGETLANEs, and that seems to be working now. If there are cases that we're missing, let me know. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Dllexport stuff cleanup:Anton Korobeynikov
1. Emit external function type information for all COFF targets since it's a feature of object format 2. Emit linker directives only for cygming (since this is ld-specific stuff) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Branches must be the last instruction in a Thumb2 IT block. Approved by Evan ↵Sandeep Patel
Cheng. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Fix encoding bits for N3VLInt3_QHS multiclass with 8-bit elements.Bob Wilson
Patch by Johnny Chen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84206 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Fix ARM memory operand parsing of post indexing with just a base register, thatKevin Enderby
is just "[Rn]" and no tailing comma with an offset, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84205 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Fix a potential performance problem in placing ARM constant pools.Bob Wilson
In the case where there are no good places to put constants and we fall back upon inserting unconditional branches to make new blocks, allow all constant pool references in range of those blocks to put constants there, even if that means resetting the "high water marks" for those references. This will still terminate because you can't keep splitting blocks forever, and in the bad cases where we have to split blocks, it is important to avoid splitting more than necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84202 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15More bits of the ARM target assembler for llvm-mc, code added to parse labelsKevin Enderby
as expressions, code for parsing a few arm specific directives (still needs the MCStreamer calls for these). Some clean up of the operand parsing code and adding some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Remove X86Subtarget::IsLinux. It's no longer being used.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Add files Sanjiv forgot.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Re-apply 84180 with the fixed test case.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Move Blackfin intrinsics into the Target/Blackfin directory.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Clean up TargetIntrinsicInfo API. Add pure virtual methods.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Revert "Complete Rewrite of AsmPrinter, TargetObjectFile based on newDaniel Dunbar
PIC16Section class", it breaks globals.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84184 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Complete Rewrite of AsmPrinter, TargetObjectFile based on new PIC16Section classSanjiv Gupta
derived from MCSection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84180 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Few changes to comply with new DebugInfo Metadata representation.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Be smarter about reusing constant pool entries.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Fix another problem with ARM constant pools. Radar 7303551.Bob Wilson
When ARMConstantIslandPass cannot find any good locations (i.e., "water") to place constants, it falls back to inserting unconditional branches to make a place to put them. My recent change exposed a problem in this area. We may sometimes append to the same block more than one unconditional branch. The symptoms of this are that the generated assembly has a branch to an undefined label and running llc with -debug will cause a seg fault. This happens more easily since my change to prevent CPEs from moving from lower to higher addresses as the algorithm iterates, but it could have happened before. The end of the block may be in range for various constant pool references, but the insertion point for new CPEs is not right at the end of the block -- it is at the end of the CPEs that have already been placed at the end of the block. The insertion point could be out of range. When that happens, the fallback code will always append another unconditional branch if the end of the block is in range. The fix is to only append an unconditional branch if the block does not already end with one. I also removed a check to see if the constant pool load instruction is at the end of the block, since that is redundant with checking if the end of the block is in-range. There is more to be done here, but I think this fixes the immediate problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84172 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Fix instruction encoding bits for NEON VPADAL.Bob Wilson
Patch by Johnny Chen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Remove unused variables to fix build warning.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Inst{11-8} for vshl should be 0b0101, not 0b1111.Jim Grosbach
Refs: A7-17 & A8-750. Patch by Johnny Chen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84131 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Set instruction encoding bits 4 and 7 for ARM register-register andBob Wilson
register-shifted-register instructions. Patch by Johnny Chen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Refactor code to select NEON VST intrinsics.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84122 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Refactor code to select NEON VLD intrinsics.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84117 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14More refactoring. NEON vst lane intrinsics can share almost all the code forBob Wilson
vld lane intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84110 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Refactor code for selecting NEON load lane intrinsics.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84109 91177308-0d34-0410-b5e6-96231b3b80d8
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