| Age | Commit message (Expand) | Author |
|---|
| 2012-12-21 | Call llvm_unreachable instead of assert. | Reed Kotler |
| 2012-12-20 | Add an MF argument to MI::copyImplicitOps(). | Jakob Stoklund Olesen |
| 2012-12-20 | MachineInstrBuilderize ARM. | Jakob Stoklund Olesen |
| 2012-12-20 | MachineInstrBuilderize NVPTX. | Jakob Stoklund Olesen |
| 2012-12-20 | Revert "Adding support for llvm.arm.neon.vaddl[su].* and" | Bob Wilson |
| 2012-12-20 | On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, | Evan Cheng |
| 2012-12-20 | Remove MCTargetAsmLexer and its derived classes now that edis, | Roman Divacky |
| 2012-12-20 | Adding support for llvm.arm.neon.vaddl[su].* and | Renato Golin |
| 2012-12-20 | Implement cfi_def_cfa_offset. "Make check" test case for this comming in the | Reed Kotler |
| 2012-12-20 | There is one more patch to finish large frames. Make sure we assert | Reed Kotler |
| 2012-12-20 | Add constant extender support to GP-relative load/store instructions. | Jyotsna Verma |
| 2012-12-20 | Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps. | Jyotsna Verma |
| 2012-12-20 | set register class properly for mips16 here | Reed Kotler |
| 2012-12-20 | Undefine PPC harder. | Rafael Espindola |
| 2012-12-20 | This assert is overly restrictive and does not work for mips16. | Reed Kotler |
| 2012-12-20 | Turn on register scavenger for Mips 16 | Reed Kotler |
| 2012-12-20 | [mips] Refactor SLT (set on less than) instructions. Separate encoding | Akira Hatanaka |
| 2012-12-20 | [mips] Refactor unconditional branch instruction. Separate encoding information | Akira Hatanaka |
| 2012-12-20 | [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass | Akira Hatanaka |
| 2012-12-20 | [mips] Delete definition of CPRESTORE instruction. | Akira Hatanaka |
| 2012-12-20 | [mips] Refactor conditional branch instructions with one register operand. | Akira Hatanaka |
| 2012-12-20 | [mips] Refactor conditional branch instructions with two register operands. | Akira Hatanaka |
| 2012-12-20 | fix most of remaining issues with large frames. | Reed Kotler |
| 2012-12-20 | [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy | Akira Hatanaka |
| 2012-12-20 | Fix use-before-construction of X86TargetLowering. | Richard Smith |
| 2012-12-20 | [mips] Change the order of template parameters. Move the default parameters to | Akira Hatanaka |
| 2012-12-20 | [mips] Refactor shift instructions with register operands. Separate encoding | Akira Hatanaka |
| 2012-12-20 | [mips] Refactor shift immediate instructions. Separate encoding information | Akira Hatanaka |
| 2012-12-20 | [mips] Refactor arithmetic and logic instructions with immediate operands. | Akira Hatanaka |
| 2012-12-20 | [mips] Refactor arithmetic and logic instructions. Separate encoding | Akira Hatanaka |
| 2012-12-20 | [mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and | Akira Hatanaka |
| 2012-12-20 | Target/R600: Update MIB according to r170588. | NAKAMURA Takumi |
| 2012-12-19 | MC: Add MCInstrDesc::mayAffectControlFlow() method. | Jim Grosbach |
| 2012-12-19 | R600: Remove unecessary VREG alignment. | Tom Stellard |
| 2012-12-19 | R600: control flow optimization | Tom Stellard |
| 2012-12-19 | R600: New control flow for SI v2 | Tom Stellard |
| 2012-12-19 | Remove the explicit MachineInstrBuilder(MI) constructor. | Jakob Stoklund Olesen |
| 2012-12-19 | LLVM sdisel normalize bit extraction of the form: | Evan Cheng |
| 2012-12-19 | Remove edis - the enhanced disassembler. Fixes PR14654. | Roman Divacky |
| 2012-12-19 | Transform (x&C)>V into (x&C)!=0 where possible | Paul Redmond |
| 2012-12-19 | PowerPC: Expand VSELECT nodes. | Benjamin Kramer |
| 2012-12-19 | Change TargetLowering::getTypeForExtArgOrReturn to take and return | Patrik Hagglund |
| 2012-12-19 | Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of | Patrik Hagglund |
| 2012-12-19 | Change TargetLowering::findRepresentativeClass to take an MVT, instead | Patrik Hagglund |
| 2012-12-19 | X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses] | NAKAMURA Takumi |
| 2012-12-19 | Optimized load + SIGN_EXTEND patterns in the X86 backend. | Elena Demikhovsky |
| 2012-12-19 | Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl... | Bill Wendling |
| 2012-12-19 | Add some missing Defs and Uses. | Reed Kotler |
| 2012-12-18 | Reverse order of checking SSE level when calculating compare cost, so we check | Jakub Staszak |
| 2012-12-18 | Disable ARM partial flag dependency optimization at -Oz | Quentin Colombet |
