aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Expand)Author
2012-11-13misched: Allow subtargets to enable misched and dependent options.Andrew Trick
2012-11-13Test commit.Jyotsna Verma
2012-11-12misched: Target-independent support for load/store clustering.Andrew Trick
2012-11-12Make TOC order deterministic by using MapVector instead of DenseMap.Ulrich Weigand
2012-11-12Remove unused field.Eric Christopher
2012-11-12Fix PR14314Michael Liao
2012-11-12[NVPTX] Add more precise PTX/SM target attributesJustin Holewinski
2012-11-11Move some helper methods to being static functions in the implementation file.Craig Topper
2012-11-11Use the isTruncFree and isZExtFree API to figure out of these operations are ...Nadav Rotem
2012-11-10Remove unnecessary subtraction and addition by 1 around a couple for loops.Craig Topper
2012-11-10Tidy up spacing. No functional change.Craig Topper
2012-11-10Removed unimplemented method declaration.Craig Topper
2012-11-10Simplify custom emitter code for pcmp(e/i)str(i/m) and make the helper functi...Craig Topper
2012-11-10Add more functions to the target library information.Meador Inge
2012-11-10Disable the Thumb no-return call optimization:Evan Cheng
2012-11-10Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper
2012-11-09[NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski
2012-11-09Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.Anton Korobeynikov
2012-11-09Switch FreeBSD/i386 back to 4byte stack alignment. This partiallyRoman Divacky
2012-11-09Revert r167620; this can be implemented using an existing CL option.Chad Rosier
2012-11-09Add support for -mstrict-align compiler option for ARM targets.Chad Rosier
2012-11-09indentNadav Rotem
2012-11-08Recommit modified r167540.Amara Emerson
2012-11-08Add support of RTM from TSX extensionMichael Liao
2012-11-07[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka
2012-11-07Delete MipsFunctionInfo::NextStackOffset. No functionality change intended. Akira Hatanaka
2012-11-07Revert r167540 until regression tests are updated.Amara Emerson
2012-11-07Improve ARM build attribute emission for architectures types.Amara Emerson
2012-11-07[arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier
2012-11-06Simplify code. No functionality change.Jakub Staszak
2012-11-06Make the helper functions static. No functional change.Nadav Rotem
2012-11-06Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier
2012-11-06CostModel: add another known vector trunc optimization.Nadav Rotem
2012-11-06Cost Model: add tables for some avx type-conversion hacks.Nadav Rotem
2012-11-06Remove tailing whitespacesMichael Liao
2012-11-06ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick
2012-11-05Refactor the getTypeLegalizationCost interface. No functionality change.Nadav Rotem
2012-11-05CostModel: Add tables for the common x86 compares.Nadav Rotem
2012-11-05Code Model: Improve the accuracy of the zext/sext/trunc vector cost estimation.Nadav Rotem
2012-11-05Suppress signed/unsigned comparison warning.Richard Smith
2012-11-05Cost Model: Normalize the insert/extract index when splitting typesNadav Rotem
2012-11-05Cost Model: teach the cost model about expanding integers.Nadav Rotem
2012-11-05On PowerPC64, integer return values (as well as arguments) are supposedUlrich Weigand
2012-11-05Implement the cost of abnormal x86 instruction lowering as a table.Nadav Rotem
2012-11-05Add support for the PowerPC-specific inline asm Z constraint and y modifier.Hal Finkel
2012-11-05[PATCH] PowerPC: Expand load extend vector operationsAdhemerval Zanella
2012-11-04Remove alignments from folding tables for scalar FMA4 instructions.Craig Topper
2012-11-03[mips] Set flag neverHasSideEffects flag on floating point conversionAkira Hatanaka
2012-11-03X86 CostModel: Add support for a some of the common arithmetic instructions f...Nadav Rotem
2012-11-03[mips] Set flag isAsCheapAsAMove flag on instruction LUi.Akira Hatanaka