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2011-04-23Remove unused STL header includes.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23Silence an overzealous uninitialized variable warning from GCC.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23Thumb2 and ARM add/subtract with carry fixes.Andrew Trick
Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22Disassembly of A8.6.59 LDR (literal) Encoding T1 (16-bit thumb instruction) ↵Johnny Chen
should print out ldr, not ldr.n. rdar://problem/9267772 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22DAGCombine: fold "(zext x) == C" into "x == (trunc C)" if the trunc is lossless.Benjamin Kramer
On x86 this allows to fold a load into the cmp, greatly reducing register pressure. movzbl (%rdi), %eax cmpl $47, %eax -> cmpb $47, (%rdi) This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22Add asserts.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22X86: Try to use a smaller encoding by transforming (X << C1) & C2 into (X & ↵Benjamin Kramer
(C2 >> C1)) & C1. (Part of PR5039) This tends to happen a lot with bitfield code generated by clang. A simple example for x86_64 is uint64_t foo(uint64_t x) { return (x&1) << 42; } which used to compile into bloated code: shlq $42, %rdi ## encoding: [0x48,0xc1,0xe7,0x2a] movabsq $4398046511104, %rax ## encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00] andq %rdi, %rax ## encoding: [0x48,0x21,0xf8] ret ## encoding: [0xc3] with this patch we can fold the immediate into the and: andq $1, %rdi ## encoding: [0x48,0x83,0xe7,0x01] movq %rdi, %rax ## encoding: [0x48,0x89,0xf8] shlq $42, %rax ## encoding: [0x48,0xc1,0xe0,0x2a] ret ## encoding: [0xc3] It's possible to save another byte by using 'andl' instead of 'andq' but I currently see no way of doing that without making this code even more complicated. See the TODOs in the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22In Thumb2 mode, lower frame indix references to:Evan Cheng
add <rd>, sp, #<imm8> ldr <rd>, [sp, #<imm8>] When the offset from sp is multiple of 4 and in range of 0-1020. This saves code size by utilizing 16-bit instructions. rdar://9321541 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129971 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22Compute the size of the FDE encoding instead of hard coding it. UpdateRafael Espindola
X8664_ELFTargetObjectFile::getFDEEncoding to match reality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21Remove unused argument.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21Fix DWARF description of Q registers.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21Fix DWARF description of S registers.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21As per ARM docs, register Dx is described as DW_OP_regx(256+x) in DWARF.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21PTX: Expand useable register spaceJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129913 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21ptx: fix parameter orderingChe-Liang Chiou
This patch depends on the prior fix r129908 that changes to use std::find, rather than std::binary_search, on unordered array. Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21ptx: PTXMachineFunctionInfo no longer sort registers and so should not use ↵Che-Liang Chiou
std::binary_search git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129908 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Remove -use-divmod-libcall. Let targets opt in when they are available.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Revert r129846; it's breaking a buildbot. SeeEli Friedman
http://google1.osuosl.org:8011/builders/llvm-x86_64-linux-checks/builds/825/steps/test.llvm.stage2/logs/st.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Prefer cheap registers for busy live ranges.Jakob Stoklund Olesen
On the x86-64 and thumb2 targets, some registers are more expensive to encode than others in the same register class. Add a CostPerUse field to the TableGen register description, and make it available from TRI->getCostPerUse. This represents the cost of a REX prefix or a 32-bit instruction encoding required by choosing a high register. Teach the greedy register allocator to prefer cheap registers for busy live ranges (as indicated by spill weight). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Excise unintended hunk in 129858. <rdar://problem/7662569>Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20ARM byval support. Will be enabled by another patch to the FE. ↵Stuart Hastings
<rdar://problem/7662569> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20PTX: Add intrinsics to list of built-in intrinsics, which allows them to beJustin Holewinski
used by Clang. To help Clang integration, the PTX target has been split into two targets: ptx32 and ptx64, depending on the desired pointer size. - Add GCCBuiltin class to all intrinsics - Split PTX target into ptx32 and ptx64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20ptx: add integer div and rem instructionChe-Liang Chiou
Patched by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20ptx: add floating-point comparison to setpChe-Liang Chiou
Patched by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20ptx: fix parameter orderingChe-Liang Chiou
Patched by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129846 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20This should always be signed chars, so use int8_t. This fixes a miscompile whenNick Lewycky
llvm is built with unsigned chars where an immediate such as 0xff would be zero extended to 64-bits, turning "cmp $0xff,%eax" into "cmp $0xffffffffffffffff,%eax". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129845 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Remove unused arguments.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20ADT/Triple: Renambe isOSX... methods to isMacOSX for consistency with the OSDaniel Dunbar
triple component. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129838 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Fix typo in the comment.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()Daniel Dunbar
predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Target/X86: Eliminate uses of getDarwinVers().Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129813 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Target/X86: Add getTargetTriple() accessor.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Target/PPC: Kill off DarwinVers, which is now dead.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Target/PPC: Eliminate a use of getDarwinVers().Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Target/PPC: Add a TargetTriple field.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Target: Eliminate a use of getDarwinMajorNumber().Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129803 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Remove some duplicate op action entries and reorganize.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19This patch combines several changes from Evan Cheng for rdar://8659675.Bob Wilson
Making use of VFP / NEON floating point multiply-accumulate / subtraction is difficult on current ARM implementations for a few reasons. 1. Even though a single vmla has latency that is one cycle shorter than a pair of vmul + vadd, a RAW hazard during the first (4? on Cortex-a8) can cause additional pipeline stall. So it's frequently better to single codegen vmul + vadd. 2. A vmla folowed by a vmul, vmadd, or vsub causes the second fp instruction to stall for 4 cycles. We need to schedule them apart. 3. A vmla followed vmla is a special case. Obvious issuing back to back RAW vmla + vmla is very bad. But this isn't ideal either: vmul vadd vmla Instead, we want to expand the second vmla: vmla vmul vadd Even with the 4 cycle vmul stall, the second sequence is still 2 cycles faster. Up to now, isel simply avoid codegen'ing fp vmla / vmls. This works well enough but it isn't the optimial solution. This patch attempts to make it possible to use vmla / vmls in cases where it is profitable. A. Add missing isel predicates which cause vmla to be codegen'ed. B. Make sure the fmul in (fadd (fmul)) has a single use. We don't want to compute a fmul and a fmla. C. Add additional isel checks for vmla, avoid cases where vmla is feeding into fp instructions (except for the #3 exceptional case). D. Add ARM hazard recognizer to model the vmla / vmls hazards. E. Add a special pre-regalloc case to expand vmla / vmls when it's likely the vmla / vmls will trigger one of the special hazards. Enable these fp vmlx codegen changes for Cortex-A9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129775 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Add -mcpu=cortex-a9-mp. It's cortex-a9 with MP extension. rdar://8648637.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129774 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Avoid some 's' 16-bit instruction which partially update CPSRBob Wilson
(and add false dependency) when it isn't dependent on last CPSR defining instruction. rdar://8928208 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129773 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Avoid write-after-write issue hazards for Cortex-A9.Bob Wilson
Add a avoidWriteAfterWrite() target hook to identify register classes that suffer from write-after-write hazards. For those register classes, try to avoid writing the same register in two consecutive instructions. This is currently disabled by default. We should not spill to avoid hazards! The command line flag -avoid-waw-hazard can be used to enable waw avoidance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129772 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Some single-precision VFP instructions can execute in either the VPF or NeonBob Wilson
pipelines, at least on Cortex-A9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Improvements for the Cortex-A9 scheduling itineraries.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129770 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Add support for FastISel'ing varargs calls.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129765 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Implement support for x86 fastisel of small fixed-sized memcpys, which are ↵Chris Lattner
generated en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x and shrinks the generated .s file by 5% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129755 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19tidy upChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129753 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Implement support for fast isel of calls of i1 arguments, even though they ↵Chris Lattner
are illegal, when they are a truncate from something else. This eliminates fully half of all the fastisel rejections on a test c++ file I'm working with, which should make a substantial improvement for -O0 compile of c++ code. This fixed rdar://9297003 - fast isel bails out on all functions taking bools git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Handle i1/i8/i16 constant integer arguments to calls by prepromoting them.Chris Lattner
Before we would bail out on i1 arguments all together, now we just bail on non-constant ones. Also, we used to emit extraneous code. e.g. test12 was: movb $0, %al movzbl %al, %edi callq _test12 and test13 was: movb $0, %al xorl %edi, %edi movb %al, 7(%rsp) callq _test13f Now we get: movl $0, %edi callq _test12 and: movl $0, %edi callq _test13f git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19be layout aware, to produce:Chris Lattner
testb $1, %al je LBB0_2 ## BB#1: ## %if.then movb $0, %al instead of: testb $1, %al jne LBB0_1 jmp LBB0_2 LBB0_1: ## %if.then movb $0, %al how 'bout that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129749 91177308-0d34-0410-b5e6-96231b3b80d8
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