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AgeCommit message (Expand)Author
2013-03-20Model prefetches and barriers as loads.Jakob Stoklund Olesen
2013-03-20Add a catch-all WriteSystem SchedWrite type.Jakob Stoklund Olesen
2013-03-20Annotate the remaining SSE MOV instructions.Jakob Stoklund Olesen
2013-03-20Annotate SSE horizontal and integer instructions.Jakob Stoklund Olesen
2013-03-20Correct cost model for vector shift on AVX2Michael Liao
2013-03-20Add some missing SSE annotations.Jakob Stoklund Olesen
2013-03-20Annotate remaining IIC_BIN_* instructions.Jakob Stoklund Olesen
2013-03-20Fix PR15296Michael Liao
2013-03-20Mark all variable shifts needing customizingMichael Liao
2013-03-20Move scalar immediate shift lowering into a dedicated funcMichael Liao
2013-03-19Fix pr13145 - Naming a function like a register name confuses the asm parser.Chad Rosier
2013-03-19Annotate various null idioms with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Annotate SSE float conversions with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Annotate X86InstrCMovSetCC.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19[ms-inline asm] Move the immediate asm rewrite into the target specificChad Rosier
2013-03-19Annotate X86InstrCompiler.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19[ms-inline asm] Create a helper function, CreateMemForInlineAsm, that createsChad Rosier
2013-03-19Add missing mayLoad flag to LHAUX8 and LWAUX.Ulrich Weigand
2013-03-19Rewrite LHAU8 pattern to use standard memory operand.Ulrich Weigand
2013-03-19Rewrite pre-increment store patterns to use standard memory operands.Ulrich Weigand
2013-03-19Fix sub-operand size mismatch in tocentry operands.Ulrich Weigand
2013-03-19Remove an invalid and unnecessary Pat pattern from the X86 backend:Ulrich Weigand
2013-03-19Prepare to make r0 an allocatable register on PPCHal Finkel
2013-03-19Optimize sext <4 x i8> and <4 x i16> to <4 x i64>.Nadav Rotem
2013-03-19Annotate X86InstrExtension.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Annotate a lot of X86InstrInfo.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19[ms-inline asm] Move the size directive asm rewrite into the target specificChad Rosier
2013-03-19Cleanup PPC64 unaligned i64 load/storeHal Finkel
2013-03-19Improve long vector sext/zext lowering on ARMRenato Golin
2013-03-19Don't reserve R31 on PPC64 unless the frame pointer is neededHal Finkel
2013-03-18Fix a sign-extension bug in PPCCTRLoopsHal Finkel
2013-03-18[ms-inline asm] Avoid emitting a redundant sizing directive, if we've alreadyChad Rosier
2013-03-18Fix PPC unaligned 64-bit loads and storesHal Finkel
2013-03-18ARM cost model: Make some vector integer to float casts cheaperArnold Schwaighofer
2013-03-18ARM cost model: Correct cost for some cheap float to integer conversionsArnold Schwaighofer
2013-03-18Add SchedRW annotations to most of X86InstrSSE.td.Jakob Stoklund Olesen
2013-03-18Annotate X86 arithmetic instructions with SchedRW lists.Jakob Stoklund Olesen
2013-03-18Fix 80-col. violations in PPCCTRLoopsHal Finkel
2013-03-18Fix large count and negative constant count handling in PPCCTRLoopsHal Finkel
2013-03-18Cleanup initial-value constants in PPCCTRLoopsHal Finkel
2013-03-18R600/SI: implement indirect adressing for SIChristian Konig
2013-03-18R600/SI: add float vector typesChristian Konig
2013-03-18R600/SI: add shl patternChristian Konig
2013-03-18R600/SI: add BUFFER_LOAD_DWORD patternChristian Konig
2013-03-18R600/SI: implement SI.load.const intrinsicChristian Konig
2013-03-18R600/SI: enable all S_LOAD and S_BUFFER_LOAD opcodesChristian Konig
2013-03-18R600/SI: fix inserting waits for all definesChristian Konig
2013-03-18TLS support for MinGW targets.Anton Korobeynikov
2013-03-18Post process ADC/SBB and use a shorter encoding if they use a sign extended i...Craig Topper
2013-03-18Refactor some duplicated code into helper functions.Craig Topper
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