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AgeCommit message (Expand)Author
2012-04-17Remove unused CCIfSubtarget.Jay Foad
2012-04-17Fix bad EXTRACT_SUBREG in instruction selection for extending-loads on NEON.James Molloy
2012-04-17Don't decode vperm2i128 or vperm2f128 into a shuffle if bit 3 or 7 of the imm...Craig Topper
2012-04-17Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)Kevin Enderby
2012-04-16ARM two-operand forms for vhadd and vhsub instructions.Jim Grosbach
2012-04-16Temporarily turn off anti-dependency checkingPreston Gurd
2012-04-16ARM handle :lower16: and :upper16: after a '#' prefix.Jim Grosbach
2012-04-16Fix incorrect atomics codegen introduced in r154705, and extend test to catch...Richard Smith
2012-04-16Remove unused variableDavid Blaikie
2012-04-16ARM assembly two-operand forms for VRSHL.Jim Grosbach
2012-04-16Do not add offset in applyFixup. This has already been accounted for in Value. Akira Hatanaka
2012-04-16ARM two-operand aliases for VRHADD instructions.Jim Grosbach
2012-04-16Hexagon V5 (Floating Point) Support.Sirish Pande
2012-04-16Replace vpermd/vpermps intrinic patterns with custom lowering to target speci...Craig Topper
2012-04-16Change type profile for vpermv back to using operand type for the mask argume...Craig Topper
2012-04-16Flip the arguments when converting vpermd/vpermps intrinsics into instruction...Craig Topper
2012-04-16Merge vpermps/vpermd and vpermpd/vpermq SD nodes.Craig Topper
2012-04-16Fix SDTypeProfile for vpermps. The mask operand should be v8i32.Craig Topper
2012-04-15Spacing fixes and 80 column fixes. Use 0 instead of 0x80 for undef indices in...Craig Topper
2012-04-15Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with norm...Craig Topper
2012-04-15Fix PR12529. The Vxx family of instructions are only supported by AVX.Nadav Rotem
2012-04-15Wire up support for diagnostic ranges in the ARMAsmParser.Benjamin Kramer
2012-04-15Added VPERM optimization for AVX2 shufflesElena Demikhovsky
2012-04-15HexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with -Asse...NAKAMURA Takumi
2012-04-15Target/Hexagon: Tweak to fix msvc build.NAKAMURA Takumi
2012-04-13Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x...Richard Smith
2012-04-13Remove iostream from New Value Jump.Sirish Pande
2012-04-13Add support for Hexagon Architectural feature, New Value Jump.Sirish Pande
2012-04-13Pass to replace tranfer/copy instructions into combine instruction where poss...Sirish Pande
2012-04-13On Darwin targets, only use vfma etc. if the source use fma() intrinsic expli...Evan Cheng
2012-04-13For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby
2012-04-13Silence various build warnings from Hexagon backend that show up in release b...Craig Topper
2012-04-12Fix a few more places in the ARM disassembler so that branches getKevin Enderby
2012-04-12Update CMake build.Ted Kremenek
2012-04-12Hexagon: fix CMake error.Evandro Menezes
2012-04-12HexagonPacketizer patch.Sirish Pande
2012-04-12Generalize r153635 to deal with TokenFactor chains; also clean up the logic a...Evan Cheng
2012-04-12Hexagon: enable assembler output through the MC layer.Evandro Menezes
2012-04-12Remove README entry obsoleted by register masks.Benjamin Kramer
2012-04-12Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are i...Craig Topper
2012-04-12ARM 'adr' fixups don't need the interworking addend tweaking.Jim Grosbach
2012-04-11Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,Akira Hatanaka
2012-04-11Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka
2012-04-11Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby
2012-04-11Fix bugs in lowering of FCOPYSIGN nodes.Akira Hatanaka
2012-04-11ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach
2012-04-11ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach
2012-04-11remove unused argumentNadav Rotem
2012-04-11Add a C binding to the Target and TargetMachine classes to allow for emittingDuncan Sands
2012-04-11Add more fused mul+add/sub patterns. rdar://10139676Evan Cheng