Age | Commit message (Expand) | Author |
2010-11-25 | Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instr... | Rafael Espindola |
2010-11-25 | Namespacify. | Benjamin Kramer |
2010-11-24 | Updating MBlaze .mask and .frame directives to match GCC's output and fixing ... | Wesley Peck |
2010-11-24 | 1. Fixing error where basic block labels were not being printed out when they... | Wesley Peck |
2010-11-24 | Use i8 as SETCC result type for i1 in SPU. | Kalle Raiskila |
2010-11-24 | Allow for 'fcmp ogt' in SPU. | Kalle Raiskila |
2010-11-23 | The srem -> urem transform is not safe for any divisor that's not a power of ... | Benjamin Kramer |
2010-11-23 | Move the ARM reloc constants to Support/ELF.h | Jason W Kim |
2010-11-23 | Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations. | Bob Wilson |
2010-11-23 | InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is pos... | Benjamin Kramer |
2010-11-23 | Division by pow-of-2 is not cheap on SPU, do it with | Kalle Raiskila |
2010-11-23 | Implement the rex64 prefix. | Rafael Espindola |
2010-11-23 | Produce a relocation for pcrel absolute values. Based on a patch by David Meyer. | Rafael Espindola |
2010-11-23 | Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. | Wesley Peck |
2010-11-22 | Remove duplicated constants. Thanks to Jason for noticing it. | Rafael Espindola |
2010-11-22 | InstCombine: Implement X - A*-B -> X + A*B. | Benjamin Kramer |
2010-11-22 | Fix epilogue codegen to avoid leaving the stack pointer in an invalid | Evan Cheng |
2010-11-22 | Fix a bug with extractelement on SPU. | Kalle Raiskila |
2010-11-22 | Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. | Benjamin Kramer |
2010-11-22 | Fix a compiler warning about Kind being used uninitialized | Duncan Sands |
2010-11-21 | Pseudos default to 4byte size, let the instruction size field notice | Eric Christopher |
2010-11-21 | Implement ELF object file writing support for the MBlaze backend. Its not per... | Wesley Peck |
2010-11-21 | Implement branch analysis in the MBlaze backend. | Wesley Peck |
2010-11-21 | Make it a little bit more explicit that the MBlaze backend only supports upto | Wesley Peck |
2010-11-21 | Fix an error in the MBlaze delay slot filler where instructions that already | Wesley Peck |
2010-11-21 | apparently tailcalls are better on darwin/x86-64 than on linux? | Chris Lattner |
2010-11-21 | More Thumb encodings. | Bill Wendling |
2010-11-21 | Add encoding for ARM "trap" instruction. | Bill Wendling |
2010-11-21 | The "trap" instruction is one of this which doesn't have a condition code. Hack | Bill Wendling |
2010-11-21 | - Give "trap" the correct encoding, at least according to Darwin's assembler. | Bill Wendling |
2010-11-21 | implement PR8524, apparently mainline gas accepts movq as an alias for movd | Chris Lattner |
2010-11-21 | add some random notes. | Chris Lattner |
2010-11-21 | Use by-name rather than by-order operand matching for some NEON encodings. | Owen Anderson |
2010-11-21 | optimize: | Chris Lattner |
2010-11-21 | tail calls on x86 are implemented. | Chris Lattner |
2010-11-21 | BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate. | Jim Grosbach |
2010-11-20 | A few more thumb instruction MC encodings. | Bill Wendling |
2010-11-20 | Rewrite address handling to use a structure with all the possible address | Eric Christopher |
2010-11-20 | STRH only needs the additional operand, not t2STRH. Also invert conditional | Eric Christopher |
2010-11-20 | Make this compile on case-sensitive file systemsw | Anton Korobeynikov |
2010-11-20 | Move some more hooks to TargetFrameInfo | Anton Korobeynikov |
2010-11-20 | On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics, | Duncan Sands |
2010-11-20 | Add more Thumb add instruction encodings. | Bill Wendling |
2010-11-20 | Add Thumb encodings for some add instructions. | Bill Wendling |
2010-11-20 | Add more encodings for Thumb instructions. | Bill Wendling |
2010-11-20 | Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same | Bill Wendling |
2010-11-19 | Fix ARM LDR* post-indexed operand encoding. | Jim Grosbach |
2010-11-19 | Encodings for the compare instructions. | Bill Wendling |
2010-11-19 | The Vm and Vn register fields must be the same for a register-register vmov. | Owen Anderson |
2010-11-19 | Fix a cut-n-paste-error. | Evan Cheng |