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AgeCommit message (Expand)Author
2011-05-20Remove noisy semicolons.Benjamin Kramer
2011-05-20Fix bug in which nodes that write to argument registers do not get glued with...Akira Hatanaka
2011-05-20Remove code that creates unnecessary frame objects.Akira Hatanaka
2011-05-20Define variables and functions in MipsFunctionInfo.Akira Hatanaka
2011-05-20Don't attempt to tail call optimize for Win64.Chad Rosier
2011-05-20Revert r131664 and fix it in instcombine instead. rdar://9467055Evan Cheng
2011-05-19Add fast-isel support for zeroext and signext ret instructions on x86.Eli Friedman
2011-05-19Oddly people want to use the 'r' constraint for fp constants on x86.Eric Christopher
2011-05-19This fixes one divergence between LLVM and binutils for ARM in theJason W Kim
2011-05-19ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.Rafael Espindola
2011-05-19Align i64 arguments to 64 bit boundaries.Akira Hatanaka
2011-05-19crc32 with 64-bit output zeros upper 32-bits. rdar://9467055Evan Cheng
2011-05-19Increase number of available registers when target is MIPS32.Akira Hatanaka
2011-05-19Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa Stank...Akira Hatanaka
2011-05-19Reverting 131641 to investigate 'bot complaint.Stuart Hastings
2011-05-1980 columns.Jim Grosbach
2011-05-19Fix data layout string. i64 is aligned to 64 bit boundaries.Akira Hatanaka
2011-05-19Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer beStuart Hastings
2011-05-19Use the correct register class for Cell varargs spilling. This fixes all of theCameron Zwarich
2011-05-19Fixed sdiv and udiv for <4 x i16>. The test from r125402 still applies for t...Mon P Wang
2011-05-19Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier.Cameron Zwarich
2011-05-19Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointlessCameron Zwarich
2011-05-19Reuse the TargetInstrDesc.Cameron Zwarich
2011-05-19Correctly constrain a register class when computing frame offsets, as the Thumb2Cameron Zwarich
2011-05-18Revert unintentional commit.Eli Friedman
2011-05-18More instcombine simplifications towards better debug locations.Eli Friedman
2011-05-18Add missing mayLoad / mayStore flags to instruction definitions without patte...Cameron Zwarich
2011-05-18Reserve the segment registers on x86 to fix verifier failures in any code thatCameron Zwarich
2011-05-18Reserve r29 on Alpha. This fixes all verifier failures in CodeGen/Alpha.Cameron Zwarich
2011-05-18Handle perfect shuffle case that generates a vrev for vectors of floats.Tanya Lattner
2011-05-18Fix more of PR8825. Now all of CodeGen/ARM passes with VerifyCoalescing turne...Cameron Zwarich
2011-05-18Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immedi...Johnny Chen
2011-05-18Enables vararg functions that pass all arguments via registers to be optimize...Chad Rosier
2011-05-18Revise r131553. Just use the type of the input node and forgo the bitcast. rd...Evan Cheng
2011-05-18Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same ty...Evan Cheng
2011-05-18PTX: add flag to disable mad/fma selectionJustin Holewinski
2011-05-18In r131488 I misunderstood how VREV works. It splits the vector in half and s...Tanya Lattner
2011-05-18Fix typo.Cameron Zwarich
2011-05-18Fix more of PR8825 by correctly using rGPR registers when lowering atomicCameron Zwarich
2011-05-17Actually, the address operand of the Thumb2 LDREX / STREX instructions *can*Cameron Zwarich
2011-05-17Correct a minor problem with the Thumb2 LDREX and STREX instruction encodings...Cameron Zwarich
2011-05-17vrev is incorrectly defined in the perfect shuffle table. The ordering is bac...Tanya Lattner
2011-05-17Enable autodetect of popcntMon P Wang
2011-05-17Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.Eli Friedman
2011-05-17Clean up the mess created by r131467+r131469.Eli Friedman
2011-05-17Revert 131467 due to buildbot complaint.Stuart Hastings
2011-05-17Fix an obscure issue in X86_64 parameter passing: if a tiny byval isStuart Hastings
2011-05-17Fix a bug in PerformEXTRACT_VECTOR_ELTCombine. The code created an ADD SDNodeNadav Rotem
2011-05-17Update comment.Eric Christopher
2011-05-17Support XOR and AND optimization with no return value.Eric Christopher
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