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AgeCommit message (Expand)Author
2013-03-18R600/SI: add float vector typesChristian Konig
2013-03-18R600/SI: add shl patternChristian Konig
2013-03-18R600/SI: add BUFFER_LOAD_DWORD patternChristian Konig
2013-03-18R600/SI: implement SI.load.const intrinsicChristian Konig
2013-03-18R600/SI: enable all S_LOAD and S_BUFFER_LOAD opcodesChristian Konig
2013-03-18R600/SI: fix inserting waits for all definesChristian Konig
2013-03-18TLS support for MinGW targets.Anton Korobeynikov
2013-03-18Post process ADC/SBB and use a shorter encoding if they use a sign extended i...Craig Topper
2013-03-18Refactor some duplicated code into helper functions.Craig Topper
2013-03-17To avoid symbol clash, undefine PPC here. PPC may be predefined on some hosts.Sylvestre Ledru
2013-03-17Improve PPC VR (Altivec) register spillingHal Finkel
2013-03-16Remove PPC avoidWriteAfterWrite callbackHal Finkel
2013-03-16Add X86 code emitter support AVX encoded MRMDestReg instructions.Craig Topper
2013-03-16Define more SchedWrites for annotating X86 instructions.Jakob Stoklund Olesen
2013-03-15ARM cost model: Fix costs for some vector selectsArnold Schwaighofer
2013-03-15Adding an A15 specific optimization pass for interactions between S/D/Q regis...Silviu Baranga
2013-03-15ARM: Fix an old refacto.Benjamin Kramer
2013-03-15Enable unaligned memory access on PPC for scalar typesHal Finkel
2013-03-15ARM cost model: Fix cost of fptrunc and fpext instructionsArnold Schwaighofer
2013-03-15Protect PPC Altivec patterns with a predicateHal Finkel
2013-03-15Allocate the RS spill slot for any PPC function with spills and a large stack...Hal Finkel
2013-03-15Silence anonymous type in anonymous union warnings.Eric Christopher
2013-03-14Unaligned loads should use the VMOVUPS opcode.Nadav Rotem
2013-03-14Remove some unused variables to clean the Clang -Werror buildDavid Blaikie
2013-03-14[mips] Set isAllocatable bit of unallocatable register classes to 0.Akira Hatanaka
2013-03-14Prepare for adding InstrSchedModel annotations to X86 instructions.Jakob Stoklund Olesen
2013-03-14Add a new method which enables one to change register classes.Reed Kotler
2013-03-14[fast-isel] The X86FastISel::FastLowerArguments function doesn't properly handleChad Rosier
2013-03-14Move estimateStackSize from ARM into MachineFrameInfoHal Finkel
2013-03-14Provide the register scavenger to processFunctionBeforeFrameFinalizedHal Finkel
2013-03-14Use frame-index scavenging for PPC register spillingHal Finkel
2013-03-14Not all PPC functions with a frame pointer need a RS spill slotHal Finkel
2013-03-14ARM cost model: Increase cost of some vector selects we do terrible onArnold Schwaighofer
2013-03-14[mips] Fix filename in comment and delete unnecessary lines of code.Akira Hatanaka
2013-03-14Hexagon: Removed asserts regarding alignment and offset.Jyotsna Verma
2013-03-14Add back lines which were accidentally deleted in CMakeLists.txt.Akira Hatanaka
2013-03-14[mips] Define function MipsSEDAGToDAGISel::selectAddESubE.Akira Hatanaka
2013-03-14Add a comment about overlapping PPC frame offsetsHal Finkel
2013-03-14[mips] Rename functions and variables to start with proper case.Akira Hatanaka
2013-03-14Add header file MipsISelDAGToDAG.h.Akira Hatanaka
2013-03-14[mips] Define two subclasses of MipsDAGToDAGISel. Mips16DAGToDAGISel is forAkira Hatanaka
2013-03-14R600: Factorize code handling Const Read Port limitationVincent Lejeune
2013-03-14Fix the name of a variable to match its declaration. Fixes build failure from...Craig Topper
2013-03-14Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ...Craig Topper
2013-03-14Teach X86 MC instruction lowering that VMOVAPSrr and other VEX-encoded regist...Craig Topper
2013-03-14Fix PR15309Michael Liao
2013-03-13Reset some of the target options which affect code generation.Bill Wendling
2013-03-13R600: Remove unused Outputs variableVincent Lejeune
2013-03-13Add one more overload to make VS2008's debug mody happy.Benjamin Kramer
2013-03-13[mips] Define two subclasses of MipsTargetLowering. Mips16TargetLowering is forAkira Hatanaka
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