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AgeCommit message (Expand)Author
2012-03-23Remove the C backend.Eric Christopher
2012-03-22Added soft fail checks for the disassembler when decoding some corner cases o...Silviu Baranga
2012-03-22Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR...Silviu Baranga
2012-03-22Added soft fail cases for the disassembler when decoding MUL instructions on ...Silviu Baranga
2012-03-22Remove some unnecessary forward declarations.Craig Topper
2012-03-22PPC::DBG_VALUE must use Reg+Imm frame-index elimination even for large offset...Hal Finkel
2012-03-21Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby
2012-03-21Put Is64BitMemOperand into !defined(NDEBUG) for now.Joerg Sonnenberger
2012-03-21Use a signed value for this enum to avoid spuriuos warnings from gcc.Benjamin Kramer
2012-03-21Fix generation of the address size override prefix. Add assertions forJoerg Sonnenberger
2012-03-21Add typecast to silence -Wswitch warning introduced by r153153.Craig Topper
2012-03-21Spacing fixes and using 'unsigned' instead of 'int' to index to select shuffl...Craig Topper
2012-03-21Incremental big endian patch by Jack Carter.Akira Hatanaka
2012-03-20[avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu toChad Rosier
2012-03-20Change conditional instructions definitions, e.g. ANDCC, ARMPseudoExpand and ...Evan Cheng
2012-03-20remove unused variableMatt Beaumont-Gay
2012-03-20[avx] Add the AddedComplexity to the VINSERTI128 avx2 patterns to giveChad Rosier
2012-03-20Require a base pointer for stack realignment when SP may vary dynamically.Bob Wilson
2012-03-20Remove some redundant checks.Bob Wilson
2012-03-20Whitespace.Chad Rosier
2012-03-20[avx] Move the vextractf128 patterns closer to the vextractf128 def. RemoveChad Rosier
2012-03-20Fix assembling ARM vst2 instructions with double-spaced registers.Kevin Enderby
2012-03-20ARM non-scattered MachO relocations for movw/movt.Jim Grosbach
2012-03-20[avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads.Chad Rosier
2012-03-20The ARM instructions that have an unpredictable behavior when the pc register...Silviu Baranga
2012-03-20Test Commit - add a newlineRichard Barton
2012-03-20Remove code that prevented lowering shuffles if they are used by load and the...Craig Topper
2012-03-20Factor out target shuffle mask decoding from getShuffleScalarElt and use a Sm...Craig Topper
2012-03-19fix a build failure with libc++Chris Lattner
2012-03-19ARM branch relaxation for unconditional t1 branches.Jim Grosbach
2012-03-19ARM assembly, accept optional '#' on lane index number.Jim Grosbach
2012-03-19Perform mul combine when multiplying wiht negative constants.Anton Korobeynikov
2012-03-19This patch adds X86 instruction itineraries for non-pseudo opcodes inPreston Gurd
2012-03-19Add a note for -ffast-math optimization of vector norm.Benjamin Kramer
2012-03-18isCommutedMOVLMask should only look at 128-bit vectors to match isMOVLMask.Craig Topper
2012-03-17Reorder includes in Target backends to following coding standards. Remove som...Craig Topper
2012-03-17Fix some copy and paste remnants of Cell and SPU in Hexagon files.Craig Topper
2012-03-17Fix typo in file header.Craig Topper
2012-03-17Pass TargetOptions to HexagonTargetMachine constructor by reference to match ...Craig Topper
2012-03-17Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper
2012-03-16Check if we can handle the arguments of a call (and therefore the call) inBill Wendling
2012-03-16ARM fix silly typo in optional operand alias.Jim Grosbach
2012-03-16ARM divided syntax fmrx/fmxr mnemonics.Jim Grosbach
2012-03-16ARM ldm/stm register lists can be out of order.Jim Grosbach
2012-03-16ARM optional operand on MRC/MCR assembly instructions.Jim Grosbach
2012-03-16ARM vmrs system registers mvfr0 and mvfr1 handling.Jim Grosbach
2012-03-15Remove inadvertant commit.Jim Grosbach
2012-03-15[fast-isel] Address Eli's comments for r152847. Specifically, add a test caseChad Rosier
2012-03-15[fast-isel] Don't try to encode LONG_MIN using cmn instructions.Chad Rosier
2012-03-15ARM case-insensitive checking for APSR_nzcv.Jim Grosbach