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2012-08-22Add register Mips::GP to the list of reserved registers if target is bare-metalAkira Hatanaka
to prevent it from being clobbered. mips uses $gp to access small data section. This bug was originally reported by Carl Norum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Add option disable-mips-delay-filler. Turn on mips' delay slot filler byAkira Hatanaka
default. Patch by Carl Norum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22For mips64 switch statements in subroutines could generate Jack Carter
within the codegen EK_GPRel64BlockAddress. This was not supported for direct object output and resulted in an assertion. This change adds support for EK_GPRel64BlockAddress for direct object. One fallout from this is to turn on rela relocations for mips64 to match gas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Add a few functions to TargetLibraryInfo as part of PR13574.Chad Rosier
Patch by Weiming Zhao <weimingz@codeaurora.org>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Fix unaligned memory accesses when performing relocations in X86 JIT. There'sRichard Smith
no cost to using memcpy here: the fixed code is optimized by LLVM to perfect machine code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21[ms-inline asm] Do not report a Parser error when matching inline assembly.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21[ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,Chad Rosier
this is the index of the operand that failed to match. Note: This may cause a buildbot failure due to an API mismatch in clang. Should recover with my next commit to clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Fix up indentation and remove a couple else's after returns.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Use uint16_t for tables of opcodes.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Fix up indentation. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162264 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Add a couple llvm_unreachables. Add a message to several others.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162263 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Replace a break with llvm_unreachable in the default case of a nested ↵Craig Topper
switch. Condense code a bit. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar ↵Craig Topper
forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162260 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Merge FMA3 instructions with and without patterns into single classes using ↵Craig Topper
null_frag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Add a missing def flag.Jakob Stoklund Olesen
*** Bad machine code: Explicit definition marked as use *** - function: test_cos - basic block: BB#0 L.entry (0x7ff2a2024fd0) - instruction: VSETLNi32 %D11, %D11<undef>, %R0, 0, pred:14, pred:%noreg, %Q5<imp-use,kill>, %Q5<imp-def> - operand 0: %D11 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Use a SmallPtrSet to dedup successors in EmitSjLjDispatchBlock.Jakob Stoklund Olesen
The test case ARM/2011-05-04-MultipleLandingPadSuccs.ll was creating duplicate successor list entries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20fix HexagonSubtarget parsing of -mv flagSebastian Pop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162217 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20fix a case where all operands of BUILD_VECTOR are undefinedMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Fix coding style violations in 162135 and 162136.Akira Hatanaka
Patch by Petar Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162213 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Remove FMA3 intrinsic instructions in favor of patterns.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Use correct intrinsic for 256-bit VFMSUBADDPS.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162193 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19Remove trailing white space and tab characters. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162192 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19When unsafe math is used, we can use commutative FMAX and FMIN. In some casesNadav Rotem
this allows for better code generation. Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and FMINC, which are commutative. For example: movaps %xmm0, %xmm1 movsd LC(%rip), %xmm0 minsd %xmm1, %xmm0 becomes: minsd LC(%rip), %xmm0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19Fabs folding is implemented.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Remove the CAND/COR/CXOR custom ISD nodes and their select code.Jakob Stoklund Olesen
These nodes are no longer needed because the peephole pass can fold CMOV+AND into ANDCC etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Remove virtual from many methods. These methods replace methods in the base ↵Craig Topper
class, but the base class methods aren't virtual so it just increased call overhead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Also combine zext/sext into selects for ARM.Jakob Stoklund Olesen
This turns common i1 patterns into predicated instructions: (add (zext cc), x) -> (select cc (add x, 1), x) (add (sext cc), x) -> (select cc (add x, -1), x) For a function like: unsigned f(unsigned s, int x) { return s + (x>0); } We now produce: cmp r1, #0 it gt addgt.w r0, r0, #1 Instead of: movs r2, #0 cmp r1, #0 it gt movgt r2, #1 add r0, r2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Also pass logical ops to combineSelectAndUse.Jakob Stoklund Olesen
Add these transformations to the existing add/sub ones: (and (select cc, -1, c), x) -> (select cc, x, (and, x, c)) (or (select cc, 0, c), x) -> (select cc, x, (or, x, c)) (xor (select cc, 0, c), x) -> (select cc, x, (xor, x, c)) The selects can then be transformed to a single predicated instruction by peephole. This transformation will make it possible to eliminate the ISD::CAND, COR, and CXOR custom DAG nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162176 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow ↵Nadav Rotem
better compare/branch code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18fp16-to-fp32 conversion instructions are available in Thumb mode as well.Anton Korobeynikov
Make sure the generic pattern is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Refactor code a bit to reduce number of calls in the final compiled code. No ↵Craig Topper
functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Reorder initialization list to silence -WreorderCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Revert r162160 because it made a few buildbots fail.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18The X86 backend has a number of optimizations for SETCC nodes which useNadav Rotem
arithmetic instructions. However, when small data types are used, a truncate node appears between the SETCC node and the arithmetic operation. This patch adds support for this pattern. Before: xorl %esi, %edi testb %dil, %dil setne %al ret After: xorb %dil, %sil setne %al ret rdar://12081007 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Add MipsELFWriterInfo.{h,cpp}.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Correct MCJIT functionality for MIPS32 architecture.Akira Hatanaka
No new tests are added. All tests in ExecutionEngine/MCJIT that have been failing pass after this patch is applied (when "make check" is done on a mips board). Patch by Petar Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Avoid folding ADD instructions with FI operands.Jakob Stoklund Olesen
PEI can't handle the pseudo-instructions. This can be removed when the pseudo-instructions are replaced by normal predicated instructions. Fixes PR13628. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Add stub methods for mips assembly matcher. Akira Hatanaka
Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Change the `linker_private_weak_def_auto' linkage to `linkonce_odr_auto_hide' toBill Wendling
make it more consistent with its intended semantics. The `linker_private_weak_def_auto' linkage type was meant to automatically hide globals which never had their addresses taken. It has nothing to do with the `linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix among other things. The intended semantic is more like the `linkonce_odr' linkage type. Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore changing the semantics so that it produces the correct output for the linker. Note: The old linkage name `linker_private_weak_def_auto' will still parse but is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0. <rdar://problem/11754934> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Add comment, clean up code. No functional change.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Implement NEON domain switching for scalar <-> S-register vmovs on ARMTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Use nested switch to select arguments to reduce calls to EmitPCMP.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to ↵Craig Topper
reduce to only a single call to it thus allowing it to be inlined by the compiler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Remove unnecessary include of ARMGenInstrInfo.inc.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen
It is not my plan to duplicate the entire ARM instruction set with predicated versions. We need a way of representing predicated instructions in SSA form without requiring a separate opcode. Then the pseudo-instructions can go away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16Handle ARM MOVCC optimization in PeepholeOptimizer.Jakob Stoklund Olesen
Use the target independent select analysis hooks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16Revert r162034, r162035 and r162037.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16Define and handle additional fixup kinds. By Adhemerval Zanella.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162037 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16Fix typo and grammar. By Adhemerval Zanella.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16[arm-fast-isel] Add support for fastcc.Jush Lu
Without fastcc support, the caller just falls through to CallingConv::C for fastcc, but callee still uses fastcc, this inconsistency of calling convention is a problem, and fastcc support can fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
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