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2010-07-05rip out even more sporadic v2f32 support.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107610 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-05rip out the various v2f32 "mmx" handling logic, now that Chris Lattner
v2f32 is illegal on x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107609 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04Just rip v2f32 support completely out of the X86 backend. InChris Lattner
the example in the testcase, we now generate: _test1: ## @test1 movss 4(%esp), %xmm0 addss 8(%esp), %xmm0 movl 12(%esp), %eax movss %xmm0, (%eax) ret instead of: _test1: ## @test1 subl $20, %esp movl 24(%esp), %eax movq %mm0, (%esp) movq %mm0, 8(%esp) movss (%esp), %xmm0 addss 12(%esp), %xmm0 movss %xmm0, (%eax) addl $20, %esp ret v2f32 support did not work reliably because most of the X86 backend didn't know it was legal. It was apparently only added to support returning source-level v2f32 values in MMX registers in x86-32 mode. If ABI compatibility is important on this GCC-extended-vector type for some reason, then the frontend should generate IR that returns v2i32 instead of v2f32. However, we generally don't try very hard to be abi compatible on gcc extended vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107601 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04fix PR7518 - terrible codegen of <2 x float>, by only markingChris Lattner
v2f32 as legal in 32-bit mode. It is just as terrible there, but I just care about x86-64 and noone claims it is valuable in 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107600 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04indentationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04Revert r107583. I no longer think that this is the way to solve the problem.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04Mark sse_load_f32 and sse_load_f64 as having memory operandsBill Wendling
(SDNPMemOperand). This way when they're morphed the memory operands will be copied as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Minor amendment to switch-lowering improvement.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107569 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Note switch-lowering inefficiency.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107565 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Add AVX SSE4.1 blend, mpsadbw and vdpBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Add AVX SSE4.1 binop (some forms of packed max,min,mul,pack,cmp) instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107558 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Add AVX SSE4.1 Horizontal Minimum and Position instructionBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107552 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng
slots so it's always false. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107550 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Add AVX SSE4.1 round instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Simple refactoring of SSE4.1 instructions, making room for the AVX formsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107540 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02- Add support for the rest of AVX SSE3 instructionsBruno Cardoso Lopes
- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M represents a REX equivalent two byte leading opcode git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Remove early IT block formation. It's not used.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02- Two-address pass should not assume unfolding is always successful.Evan Cheng
- X86 unfolding should check if the instructions being unfolded has memoperands. If there is no memoperands, then it must assume conservative alignment. If this would introduce an expensive sse unaligned load / store, then unfoldMemoryOperand etc. should not unfold the instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02beautify outputGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107500 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02use ArgOperand APIGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107498 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Fix incorrect asm-printing of some NEON immediates. Fix weak testcase soBob Wilson
that it checks the immediate values, not just the instructions opcodes. Radar 8110263. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107487 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02use ArgOperand API (found by my previous commit)Gabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Shrink down SSE3 code by more multiclass refactoringBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Shrink down SSE3 code by some multiclass refactoring - 1st partBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107438 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01ARM function alignments were off by a power of two. svn 83242 changedBob Wilson
getFunctionAlignment and the corresponding use of that value in the ARM asm printer, but now we're using the standard asm printer. The result of this was that function alignments were dropped completely for Thumb functions. Radar 8143571. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Implement the "linker_private_weak" linkage type. This will be used forBill Wendling
Objective-C metadata types which should be marked as "weak", but which the linker will remove upon final linkage. However, this linkage isn't specific to Objective-C. For example, the "objc_msgSend_fixup_alloc" symbol is defined like this: .globl l_objc_msgSend_fixup_alloc .weak_definition l_objc_msgSend_fixup_alloc .section __DATA, __objc_msgrefs, coalesced .align 3 l_objc_msgSend_fixup_alloc: .quad _objc_msgSend_fixup .quad L_OBJC_METH_VAR_NAME_1 This is different from the "linker_private" linkage type, because it can't have the metadata defined with ".weak_definition". Currently only supported on Darwin platforms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Move SSE3 Move patterns to a more appropriate sectionBruno Cardoso Lopes
Add AVX SSE3 packed horizontal and & sub instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Add AVX SSE3 packed addsub instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Enable on-demand fast-isel.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Fix X86FastISel's add folding to actually work, and not fall backDan Gohman
to SelectionDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Add AVX SSE3 replicate and convert instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Teach X86FastISel to fold constant offsets and scaled indices inDan Gohman
the same address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107373 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01- Add AVX SSE2 Move doubleword and quadword instructions.Bruno Cardoso Lopes
- Add encode bits for VEX_W - All 128-bit SSE 1 & SSE2 instructions that are described in the .td file now have a AVX encoded form already working. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Move MOVD/MODQ code around, creating sections for each of themBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Add AVX SSE2 mask creation and conditional store instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Fix a bug introduced in r107211 where instructions with memory operands are ↵Bruno Cardoso Lopes
declared as commutable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Add AVX SSE2 packed integer extract/insert instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30use ArgOperand APIGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Add AVX SSE2 integer unpack instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107246 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Add AVX SSE2 packed integer shuffle instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107245 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Small refactoring of SSE2 packed integer shuffle instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Add AVX SSE2 pack with saturation integer instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30Add AVX SSE2 integer packed compare instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30- Add AVX form of all SSE2 logical instructionsBruno Cardoso Lopes
- Add VEX encoding bits to x86 MRM0r-MRM7r git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Add *several* AVX integer packed binop instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Revert r107205 and r107207.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Add another bswap idiom that isn't matched.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Move SSE2 Packed Integer instructions around, and create specific sections ↵Bruno Cardoso Lopes
for each of them git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107211 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Add AVX Move Aligned/Unaligned packed integersBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Introducing the "linker_weak" linkage type. This will be used for Objective-CBill Wendling
metadata types which should be marked as "weak", but which the linker will remove upon final linkage. For example, the "objc_msgSend_fixup_alloc" symbol is defined like this: .globl l_objc_msgSend_fixup_alloc .weak_definition l_objc_msgSend_fixup_alloc .section __DATA, __objc_msgrefs, coalesced .align 3 l_objc_msgSend_fixup_alloc: .quad _objc_msgSend_fixup .quad L_OBJC_METH_VAR_NAME_1 This is different from the "linker_private" linkage type, because it can't have the metadata defined with ".weak_definition". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107205 91177308-0d34-0410-b5e6-96231b3b80d8
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