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2010-07-23fix constness warningsGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23do not (implicitly) dereference iterator many times, cache it insteadGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109222 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23Declare CLMUL as a subtarget featureBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109207 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23Add x86 CLMUL (Carry-less multiplication) cpu featureBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23Add complete assembler support for FMA3 instructions, with descriptions and ↵Bruno Cardoso Lopes
encodings taken from the AVX manual git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23The only supported calling convention for X86-64 usesDale Johannesen
SSE, so we can't return floating point values if this is disabled. Detect this error for clang. With SSE1 only, f64 is a problem; it can be done, but neither llvm-gcc nor clang has ever generated correct code for it. Since nobody noticed this I think it's OK to treat it as an error for now. This also handles SSE-sized vectors of floating point. 8207686, 8204109. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23Fix some AVX instructions which didnt had HasAVX prefix. And also a problem ↵Bruno Cardoso Lopes
with PINSRW, which was totally wrong because of a typo I introduced previously git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22eliminate the TargetInstrInfo::GetInstSizeInBytes hook. Chris Lattner
ARM/PPC/MSP430-specific code (which are the only targets that implement the hook) can directly reference their target-specific instrinfo classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Add remaining AVX instructions (most of them dealing with GR64 destinations. ↵Bruno Cardoso Lopes
This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22remove the JIT "NeedsExactSize" feature and supporting logic.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22switch a private implementation of GetFunctionSizeInBytes.Chris Lattner
This is probably not the best way to implement "Force LR to be spilled if the Thumb function size is > 2048." do this, it should use the branch shortening infrastructure, but I'm just preserving functionality here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22X86MCInstLower now depends on AsmPrinter being around.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109154 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22instead of migrating it to the MC instruction encoder, justChris Lattner
rip out the implementation of X86InstrInfo::GetInstSizeInBytes. The code being ripped out just implemented a copy and hacked up version of the (old) instruction encoder, and is buggy and terrible in other ways. Since "GetInstSizeInBytes" is really only there to support the JIT's "NeedsExactSize" hook (which noone is using), just rip out the code. I will rip out the NeedsExactSize hook next. This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22ARMv4 JIT forgets to set the lr register when making a indirect function ↵Xerxes Ranby
call. Fixes PR7608 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109125 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22undo 80 column trespassing I causedGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Mark an assert-only variable as used.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109091 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Fix the generated file name for CMake.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Attempt to fix linking issues with CMake. Please review other CMake users,Chandler Carruth
especially on other platforms. Is there a better way to fix this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Update CMake files.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109081 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Custom lower the memory barrier instructions and add supportEric Christopher
for lowering without sse2. Add a couple of new testcases. Fixes a few libgomp tests and latent bugs. Remove a few todos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Fix constant island pass's handling of tBR_JTr. The offset of the ↵Evan Cheng
instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into: mov pc, r1 .align 2 LJTI0_0_0: .long LBB0_14 This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-2280-columns.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22Make fast isel win64-aware w.r.t. call-clobbered regsNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21More register pressure aware scheduling work.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Add more 256-bit forms for a bunch of regular AVX instructionsBruno Cardoso Lopes
Add 64-bit (GR64) versions of some instructions (which are not described in their SSE forms, but are described in AVX) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Fixes win64. It was broken by a previous patch where I missed the !isWin64Rafael Espindola
and then forced every register to be a vr128 on win64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumbJim Grosbach
rdar://8202967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21add some rough support for making mcinst lowering work without anChris Lattner
asmprinter or mangler around. This is option #B for killing off X86InstrInfo::GetInstSizeInBytes. Option #A (killing "needsexactsize") was sent for consideration to llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Baby steps towards ARM fast-isel.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Add missing AVX convert instructions. Those instructions are not described ↵Bruno Cardoso Lopes
in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Fix a couple issues with Win64 ABINate Begeman
1) all registers were spilled as xmm, regardless of actual size 2) win64 abi doesn't do the varargs-size-in-%al thing Still to look into: xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Avoid AVX instructions to be selected instead of its SSE formBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109032 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Fix calling convention on ARM if vfp2+ is enabled.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109009 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Pulling out previous patch, must've run the tests inEric Christopher
the wrong directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Lower MEMBARRIER on x86 and support processors without SSE2.Eric Christopher
Fixes a pile of libgomp failures in the llvm-gcc testsuite due to the libcall not existing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109004 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Add AVX only vzeroall and vzeroupper instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Teach bottom up pre-ra scheduler to track register pressure. Work in progress.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Add new AVX vpermilps, vpermilpd and vperm2f128 instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to ↵Bruno Cardoso Lopes
support it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20Add new AVX vextractf128 instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20make asmprinter optional, even though passing in null will cause things to ↵Chris Lattner
explode right now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20continue pushing dependencies around.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20reduce X86MCInstLower dependencies on asmprinter.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20pass around MF, not MMI.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20cleanups.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20move two asmprinter methods into the asmprinter .cpp file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20prune #includes a little.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20Add new AVX instruction vinsertf128Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108892 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20Using BIC for immediates needs an extra bump for its complexity to getJim Grosbach
instruction selection to prefer it when possible. rdar://7903972 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108844 91177308-0d34-0410-b5e6-96231b3b80d8
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