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2010-08-29A couple of small missed optimizations.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29- Add a parameter to T2I_bin_irs for those patterns which set the S bit.Bill Wendling
- Create T2I_bin_sw_irs to be like T2I_bin_w_irs, but that it sets the S bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29add a bunch more common shuffles to the instprinter.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112397 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29Name ANDflag to ANDS, which is less stupid.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112395 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29File missing from last commit.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, butBill Wendling
it sets the CPSR register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112393 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28I have manually decoded the imm field of an insertps one too manyChris Lattner
times. This patch causes llc and llvm-mc (which both default to verbose-asm) to print out comments after a few common shuffle instructions which indicates the shuffle mask, e.g.: insertps $113, %xmm3, %xmm0 ## xmm0 = zero,xmm0[1,2],xmm3[1] unpcklps %xmm1, %xmm0 ## xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] pshufd $1, %xmm1, %xmm1 ## xmm1 = xmm1[1,0,0,0] This is carefully factored to keep the information extraction (of the shuffle mask) separate from the printing logic. I plan to move the extraction part out somewhere else at some point for other parts of the x86 backend that want to introspect on the behavior of shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112387 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28fix the buildvector->insertp[sd] logic to not always create a redundantChris Lattner
insertp[sd] $0, which is a noop. Before: _f32: ## @f32 pshufd $1, %xmm1, %xmm2 pshufd $1, %xmm0, %xmm3 addss %xmm2, %xmm3 addss %xmm1, %xmm0 ## kill: XMM0<def> XMM0<kill> XMM0<def> insertps $0, %xmm0, %xmm0 insertps $16, %xmm3, %xmm0 ret after: _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm3 addss %xmm1, %xmm3 movdqa %xmm2, %xmm0 insertps $16, %xmm3, %xmm0 ret The extra movs are due to a random (poor) scheduling decision. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28fix the BuildVector -> unpcklps logic to not do pointless shuffles Chris Lattner
when the top elements of a vector are undefined. This happens all the time for X86-64 ABI stuff because only the low 2 elements of a 4 element vector are defined. For example, on: _Complex float f32(_Complex float A, _Complex float B) { return A+B; } We used to produce (with SSE2, SSE4.1+ uses insertps): _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $16, %xmm2, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm1 movdqa %xmm2, %xmm0 unpcklps %xmm1, %xmm0 ret We now produce: _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm3 addss %xmm1, %xmm3 movaps %xmm2, %xmm0 unpcklps %xmm3, %xmm0 ret This implements rdar://8368414 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28improve comments in the unpcklps generating logic, introduceChris Lattner
a new EltStride variable instead of reusing NumElems variable for a non-obvious purpose. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28remove the MSIL backend. It isn't maintained, is buggy, has no testcasesChris Lattner
and hasn't kept up with ToT. Approved by Anton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28Use pseudo instructions for VST1 and VST2.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112357 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28remove unions from LLVM IR. They are severely buggy and notChris Lattner
being actively maintained, improved, or extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112356 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28Clean up the logic of vector shuffles -> vector shifts.Bruno Cardoso Lopes
Also teach this logic how to handle target specific shuffles if needed, this is necessary while searching recursively for zeroed scalar elements in vector shuffle operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28We don't need to custom-select VLDMQ and VSTMQ anymore.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27When merging Thumb2 loads/stores, do not give up when the offset is one ofBob Wilson
the special values that for ARM would be used with IB or DA modes. Fall through and consider materializing a new base address is it would be profitable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson
all the other LDM/STM instructions. This fixes asm printer crashes when compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run with -O0 to check this in the future. Prior to this change VLDM/VSTM used addressing mode #5, but not really. The offset field was used to hold a count of the number of registers being loaded or stored, and the AM5 opcode field was expanded to specify the IA or DB mode, instead of the standard ADD/SUB specifier. Much of the backend was not aware of these special cases. The crashes occured when rewriting a frameindex caused the AM5 offset field to be changed so that it did not have a valid submode. I don't know exactly what changed to expose this now. Maybe we've never done much with -O0 and NEON. Regardless, there's no longer any reason to keep a count of the VLDM/VSTM registers, so we can use addressing mode #4 and clean things up in a lot of places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27Unsigned value cannot be < 0.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27Properly handle passing of FP stuff to varargs function on Win64:Anton Korobeynikov
value should be copied to the corresponding shadow reg as well. Patch by Cameron Esfahani! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard ↵Daniel Dunbar
to find miscompiles with the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112250 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach
to try to re-use scavenged frame index reference registers. rdar://8277890 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26tidy up a bit. no functional change.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Turn off the scavenging based frame reg reuse briefly to measure whether it'sJim Grosbach
still having a significant effect. It shouldn't be now that the pre-RA virtual base reg stuff is in. Assuming that's valididated by the nightly testers, we can simplify a lot of the PEI frame index code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112220 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26zap the now unused MVT::getIntVectorWithNumElementsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112218 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Use pseudo instructions for VST3.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Reapply r112176 without removing the other CMN patterns (that was ↵Bill Wendling
unintentional). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Fix comment typos.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112202 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Restrict the register to tGPR to make sure the str instruction will beJim Grosbach
encodable as a 16-bit wide instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Revert r112176; it broke test/CodeGen/Thumb2/thumb2-cmn.ll.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Reapply r112091 and r111922, support for metadata linking, with aDan Gohman
fix: add a flag to MapValue and friends which indicates whether any module-level mappings are being made. In the common case of inlining, no module-level mappings are needed, so MapValue doesn't need to examine non-function-local metadata, which can be very expensive in the case of a large module with really deep metadata (e.g. a large C++ program compiled with -g). This flag is a little awkward; perhaps eventually it can be moved into the ClonedCodeInfo class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112190 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26There seems to be a (potential) hardware bug with the CMN instruction andBill Wendling
comparison with 0. These two pieces of code should give identical results: rsbs r1, r1, 0 cmp r0, r1 mov r0, #0 it ls mov r0, #1 and: cmn r0, r1 mov r0, #0 it ls mov r0, #1 However, the CMN gives the *opposite* result when r1 is 0. This is because the carry flag is set in the CMP case but not in the CMN case. In short, the CMP instruction doesn't perform a truncate of the (logical) NOT of 0 plus the value of r0 and the carry bit (because the "carry bit" parameter to AddWithCarry is defined as 1 in this case, the carry flag will always be set when r0 >= 0). The CMN instruction doesn't perform a NOT of 0 so there is never a "carry" when this AddWithCarry is performed (because the "carry bit" parameter to AddWithCarry is defined as 0). The AddWithCarry in the CMP case seems to be relying upon the identity: ~x + 1 = -x However when x is 0 and unsigned, this doesn't hold: x = 0 ~x = 0xFFFF FFFF ~x + 1 = 0x1 0000 0000 (-x = 0) != (0x1 0000 0000 = ~x + 1) Therefore, we should disable *all* versions of CMN, especially when comparing against zero, until we can limit when the CMN instruction is used (when we know that the RHS is not 0) or when we have a hardware fix for this. (See the ARM docs for the "AddWithCarry" pseudo-code.) This is related to <rdar://problem/7569620>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Use pseudo instructions for VST1d64Q.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26fix sse1 only codegen in x86-64 mode, which is something weChris Lattner
apparently try to support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26remove dead protoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Fix PR7748 without using microsoft extensionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112128 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Enable pre-RA virtual frame base register allocation. rdar://8277890Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112127 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Revert svn 107892 (with changes to work with trunk). It caused a crash ifBob Wilson
a VLD result was not used (Radar 8355607). It should also fix pr7988, but I haven't verified that yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112118 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25we should pattern match the SSE complex arithmetic ops.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Start converting NEON load/stores to use pseudo instructions, beginning hereBob Wilson
with the VST4 instructions. Until after register allocation, we want to represent sets of adjacent registers by a single super-register. These VST4 pseudo instructions have a single QQ or QQQQ source register operand. They get expanded to the real VST4 instructions with 4 separate D register operands. Once this conversion is complete, we'll be able to remove the NEONPreAllocPass and avoid some fragile and hacky code elsewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Revert this for now, PUNPCKLDQ dont operate on v4f32Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / ↵Daniel Dunbar
clang -O3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Don't override the var from the enclosing scope.Jim Grosbach
When doing copy/paste/modify, it's apparently rather important to remember the 'modify' bit... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25zap dead codeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Remove dead recursive function. Yay for clang -Wunused-function.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25ARM/Thumb2: Fix a misselect in getARMCmp, when attempting to adjust a signedDaniel Dunbar
comparison that would overflow. - The other under/overflow cases can't actually happen because the immediates which would trigger them are legal (so we don't enter this code), but adjusted the style to make it clear the transform is always valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Do type checks before we bother to do everything else.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Fix nasty mingw32 bug, which e.g. prevented llvm-gcc bootstrap there.Anton Korobeynikov
Mark _alloca call as clobberring EFLAGS, otherwise some DCE might remove other flags-clobberring stuff (e.g. cmp instructions) occuring after _alloca call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Reorganize load mechanisms. Handle types in a little less fixed way.Eric Christopher
Fix some todos. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25PUNPCKLDQ should also be used for v4f32Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112020 91177308-0d34-0410-b5e6-96231b3b80d8
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